linux-kernel - Re: [PATCH V2 01/12] clk: mediatek: reset: Fix written reset bit offset

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Message-ID: <d5b05fa3-a1c4-d2da-482b-a9235d9cc382@collabora.com>
Date:   Thu, 21 Apr 2022 11:08:05 +0200
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
To:     Rex-BC Chen <rex-bc.chen@...iatek.com>, mturquette@...libre.com,
        sboyd@...nel.org
Cc:     matthias.bgg@...il.com, p.zabel@...gutronix.de,
        chun-jie.chen@...iatek.com, wenst@...omium.org,
        runyang.chen@...iatek.com, linux-kernel@...r.kernel.org,
        allen-kh.cheng@...iatek.com, linux-clk@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org,
        Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [PATCH V2 01/12] clk: mediatek: reset: Fix written reset bit
 offset

Il 20/04/22 15:05, Rex-BC Chen ha scritto:
> Original assert/deassert bit is BIT(0), but it's more resonable to modify
> them to BIT(id % 32) which is based on id.
> 
> This patch will not influence any previous driver because the reset is
> only used for thermal. The id (MT8183_INFRACFG_AO_THERM_SW_RST) is 0.
> 
> Fixes: 64ebb57a3df6 ("clk: reset: Modify reset-controller driver")
> Signed-off-by: Rex-BC Chen <rex-bc.chen@...iatek.com>
> Reviewed-by: Chen-Yu Tsai <wenst@...omium.org>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>