Date:   Thu, 21 Apr 2022 12:20:36 +0200
From:   Johan Hovold <johan+linaro@...nel.org>
To:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Kishon Vijay Abraham I <kishon@...com>,
        Vinod Koul <vkoul@...nel.org>,
        "Stephen Boyd" <swboyd@...omium.org>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Stanimir Varbanov <svarbanov@...sol.com>,
        Krzysztof Wilczyński <kw@...ux.com>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
        Prasad Malisetty <quic_pmaliset@...cinc.com>,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org,
        linux-phy@...ts.infradead.org,
        Johan Hovold <johan+linaro@...nel.org>
Subject: [PATCH RFC 0/5] phy: qcom-qmp: add support for pipe clock muxing

Some QMP PHYs need to remux to their pipe clock input to the pipe clock
output generated by the PHY before powering on the PHY and restore the
default source during power down.

         +---------------+
         |   PHY block   |<<---------------------------------------+
         |               |                   +-----+               |
         |   +-------+   |                   | GCC |               |
   I/P---^-->|  PLL  |---^--->pipe_clksrc--->|-\   |		   |
    clk  |   +-------+   |                   |  +--|--->pipe_clk---+
    	 |		 |	       xo--->|-/   |  
         +---------------+	             +-----|

This series moves the pipe clock mux handling from PCIe controller
driver into the PHY driver which already manages the pipe clock as the
PHY is both the producer of the pipe clock as well as its (primary)
consumer.

This is an alternative to the series posted here

	https://lore.kernel.org/r/20220413233144.275926-1-dmitry.baryshkov@linaro.org

which instead moves the mux handling into the clock drivers and ties
remuxing to the gating/ungating of the pipe clock in the GCC. That
approach means that it is still possible to have the pipe clock ungated
without providing a valid source, somethings which can cause hangs when
enabling/disabling the GDSC (presumably as some entity is consuming the
pipe clock).

Implementing this in the clock drivers also means that the
implementation is spread out over multiple files and makes it harder to
add support for new SoCs as it may not be clear that every pipe clock
mux definition needs to be updated with safe and non-safe parent-clock
indexes and an ad-hoc mux ops implementation.

The custom mux implementation currently also hides the actual topology
of the clock tree by always reporting the pipe mux source as being
provided by the PHY (e.g. as reported by debugfs).

This series, by contrast, ties the muxing to when the pipe clock source
is enabled, that is, when the PHY is powered on, so that the GCC pipe
clock always has a valid source.

The implementation is more straight-forward, avoids the one-off clock
mux implementation, and allows for documenting this once and for all in
the PHY driver.

Note that the devicetree bindings remains to be updated but that this
was left out of this RFC.

This series depends on the two qcom-qmp fixlets posted here:

	https://lore.kernel.org/all/20220420152331.5527-1-johan+linaro@kernel.org/

Johan


Dmitry Baryshkov (1):
  PCI: qcom: Remove unnecessary pipe_clk handling

Johan Hovold (4):
  phy: qcom-qmp: add support for pipe clock muxing
  arm64: dts: qcom: sc7280: move pipe mux handling to phy
  PCI: qcom: Drop pipe clock muxing
  PCI: qcom: Drop unused post-init callbacks

 arch/arm64/boot/dts/qcom/sc7280.dtsi   | 18 ++---
 drivers/pci/controller/dwc/pcie-qcom.c | 96 ++------------------------
 drivers/phy/qualcomm/phy-qcom-qmp.c    | 71 +++++++++++++++++--
 3 files changed, 76 insertions(+), 109 deletions(-)

-- 
2.35.1

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