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Message-Id: <20220422170920.401914-1-sebastian.reichel@collabora.com>
Date: Fri, 22 Apr 2022 19:09:01 +0200
From: Sebastian Reichel <sebastian.reichel@...labora.com>
To: Heiko Stuebner <heiko@...ech.de>
Cc: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>,
Bartosz Golaszewski <brgl@...ev.pl>,
Adrian Hunter <adrian.hunter@...el.com>,
Ulf Hansson <ulf.hansson@...aro.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, linux-clk@...r.kernel.org,
linux-mmc@...r.kernel.org, linux-gpio@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, kernel@...ts.collabora.co.uk,
Sebastian Reichel <sebastian.reichel@...labora.com>,
kernel@...labora.com
Subject: [PATCHv1 00/19] Basic RK3588 Support
Hi,
This patchset adds initial rudimentary support for the rk3588 SoC using
Rockchip's evaluation board for platform bringup. With this patchset it
is possible to boot into stock Debian, if it has been previously installed
on the eMMC in some way (e.g. pre-installed vendor OS) using the Debug UART
as interface. Apart from the eMMC, the boot CPU and the UART. Apart from
that nothing works and will be added separately on top step-by-step.
The patch series is based on v4.18-rc1.
-- Sebastian
Elaine Zhang (6):
dt-binding: clock: Document rockchip,rk3588-cru bindings
clk: rockchip: add register offset of the cores select parent
clk: rockchip: add pll type for RK3588
clk: rockchip: clk-cpu: add mux setting for cpu change frequency
clk: rockchip: add dt-binding header for rk3588
clk: rockchip: Add clock controller for the RK3588
Jianqun Xu (3):
pinctrl/rockchip: add rk3588 support
gpio: rockchip: add support for rk3588
arm64: dts: rockchip: Add rk3588s pinctrl data
Kever Yang (2):
arm64: dts: rockchip: Add base DT for rk3588 SoC
arm64: dts: rockchip: Add rk3588-evb1 board
Sebastian Reichel (6):
dt-bindings: mmc: sdhci-of-dwcmhsc: Add rk3588
mmc: sdhci-of-dwcmshc: rename rk3568 to rk35xx
dt-bindings: pinctrl: rockchip: add rk3588
pinctrl/rockchip: add error handling for pull/drive register getters
dt-bindings: serial: snps-dw-apb-uart: Add Rockchip RK3588
dt-bindings: soc: rockchip: add initial rk3588 syscon compatibles
Yifeng Zhao (2):
mmc: sdhci-of-dwcmshc: add reset call back for rockchip Socs
mmc: sdhci-of-dwcmshc: add support for rk3588
.../devicetree/bindings/arm/rockchip.yaml | 5 +
.../bindings/clock/rockchip,rk3588-cru.yaml | 63 +
.../bindings/mmc/snps,dwcmshc-sdhci.yaml | 1 +
.../bindings/pinctrl/rockchip,pinctrl.yaml | 1 +
.../bindings/serial/snps-dw-apb-uart.yaml | 1 +
.../devicetree/bindings/soc/rockchip/grf.yaml | 2 +
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3588-evb1-v10.dts | 34 +
arch/arm64/boot/dts/rockchip/rk3588.dtsi | 6 +
.../boot/dts/rockchip/rk3588s-pinctrl.dtsi | 3403 +++++++++++++++++
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 501 +++
drivers/clk/rockchip/Kconfig | 7 +
drivers/clk/rockchip/Makefile | 1 +
drivers/clk/rockchip/clk-cpu.c | 69 +-
drivers/clk/rockchip/clk-pll.c | 287 +-
drivers/clk/rockchip/clk-rk3588.c | 2496 ++++++++++++
drivers/clk/rockchip/clk.h | 65 +
drivers/gpio/gpio-rockchip.c | 3 +-
drivers/mmc/host/sdhci-of-dwcmshc.c | 187 +-
drivers/pinctrl/pinctrl-rockchip.c | 468 ++-
drivers/pinctrl/pinctrl-rockchip.h | 170 +-
include/dt-bindings/clock/rk3588-cru.h | 1492 ++++++++
22 files changed, 9148 insertions(+), 115 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3588-cru.yaml
create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
create mode 100644 arch/arm64/boot/dts/rockchip/rk3588.dtsi
create mode 100644 arch/arm64/boot/dts/rockchip/rk3588s-pinctrl.dtsi
create mode 100644 arch/arm64/boot/dts/rockchip/rk3588s.dtsi
create mode 100644 drivers/clk/rockchip/clk-rk3588.c
create mode 100644 include/dt-bindings/clock/rk3588-cru.h
--
2.35.1
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