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Message-ID: <496c00b0225e8e2ce567225b94e1ce0f3ab8096d.camel@mediatek.com>
Date:   Fri, 22 Apr 2022 11:58:36 +0800
From:   Rex-BC Chen <rex-bc.chen@...iatek.com>
To:     Chen-Yu Tsai <wenst@...omium.org>
CC:     <mturquette@...libre.com>, <sboyd@...nel.org>,
        <matthias.bgg@...il.com>, <p.zabel@...gutronix.de>,
        <angelogioacchino.delregno@...labora.com>,
        <chun-jie.chen@...iatek.com>, <runyang.chen@...iatek.com>,
        <linux-kernel@...r.kernel.org>, <allen-kh.cheng@...iatek.com>,
        <linux-clk@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <Project_Global_Chrome_Upstream_Group@...iatek.com>
Subject: Re: [PATCH V2 02/12] clk: mediatek: reset: Use simple reset
 operations

Hello Cehn-Yu,

On Thu, 2022-04-21 at 15:52 +0800, Chen-Yu Tsai wrote:
> On Wed, Apr 20, 2022 at 9:05 PM Rex-BC Chen <rex-bc.chen@...iatek.com
> > wrote:
> > 
> > There are two version for clock reset register control of MediaTek
> > SoCs.
> > The reset operations before MT8183 can use simple reset to cover.
> 
> I would go slightly into more detail, i.e.
> 
>     The old hardware is one bit per reset control, and does not have
>     separate registers for bit set, clear and read-back operations.
> This
>     matches the scheme supported by the simple reset driver. ...
> 
> > Therefore, we replace mtk_reset_ops with reset_simple_ops.
> 
>    ... to remove redundant code.
> 
> The "why" is more important than "what" in commit logs. "What" you
> did
> is already visible in the diff.
> 

Got it, I will modify this in next version.

> > In addition, we also rename mtk_register_reset_controller to
> > mtk_register_reset_controller_simple.
> > 
> > Signed-off-by: Rex-BC Chen <rex-bc.chen@...iatek.com>
> > ---
> >  drivers/clk/mediatek/Kconfig          |  1 +
> >  drivers/clk/mediatek/clk-mt2701-eth.c |  2 +-
> >  drivers/clk/mediatek/clk-mt2701-g3d.c |  2 +-
> >  drivers/clk/mediatek/clk-mt2701-hif.c |  2 +-
> >  drivers/clk/mediatek/clk-mt2701.c     |  4 +--
> >  drivers/clk/mediatek/clk-mt2712.c     |  4 +--
> >  drivers/clk/mediatek/clk-mt7622-eth.c |  2 +-
> >  drivers/clk/mediatek/clk-mt7622-hif.c |  4 +--
> >  drivers/clk/mediatek/clk-mt7622.c     |  4 +--
> >  drivers/clk/mediatek/clk-mt7629-eth.c |  2 +-
> >  drivers/clk/mediatek/clk-mt7629-hif.c |  4 +--
> >  drivers/clk/mediatek/clk-mt8135.c     |  4 +--
> >  drivers/clk/mediatek/clk-mt8173.c     |  4 +--
> >  drivers/clk/mediatek/clk-mtk.h        |  6 ++--
> >  drivers/clk/mediatek/reset.c          | 43 +++------------------
> > ------
> >  15 files changed, 27 insertions(+), 61 deletions(-)
> 
> [...]
> 
> >  void mtk_register_reset_controller_set_clr(struct device_node *np,
> >         unsigned int num_regs, int regofs)
> >  {
> >         mtk_register_reset_controller_common(np, num_regs, regofs,
> > -               &mtk_reset_ops_set_clr);
> > +                                            &mtk_reset_ops_set_clr
> > );
> 
> This change is unrelated and should not be included.
> 
> ChenYu
> 

I add a refinement patch in next version, and I will move this to that
patch.

BRs,
Rex

> 
> >  }
> > 
> >  MODULE_LICENSE("GPL");
> > --
> > 2.18.0
> > 

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