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Message-ID: <d4d7e8a1-6eee-ac2d-cf8f-0a71dd4dabd8@baylibre.com>
Date: Fri, 22 Apr 2022 14:30:07 +0200
From: Neil Armstrong <narmstrong@...libre.com>
To: Yu Tu <yu.tu@...ogic.com>, linux-serial@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-amlogic@...ts.infradead.org, linux-kernel@...r.kernel.org,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Kevin Hilman <khilman@...libre.com>,
Jerome Brunet <jbrunet@...libre.com>
Cc: Jiri Slaby <jirislaby@...nel.org>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Subject: Re: [PATCH V3 1/2] tty: serial: meson: Add a 12MHz internal clock
rate to calculate baud rate in order to meet the baud rate requirements of
special BT modules
On 22/04/2022 13:13, Yu Tu wrote:
> A /2 divider over XTAL was introduced since G12A, and is preferred
> to be used over the still present /3 divider since it provides much
> closer frequencies vs the request baudrate. Especially the BT module
> uses 3Mhz baud rate. 8Mhz calculations can lead to baud rate bias,
> causing some problems.
>
> Signed-off-by: Yu Tu <yu.tu@...ogic.com>
> ---
> drivers/tty/serial/meson_uart.c | 17 +++++++++++++++--
> 1 file changed, 15 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c
> index 8e59624935af..58bd2723c004 100644
> --- a/drivers/tty/serial/meson_uart.c
> +++ b/drivers/tty/serial/meson_uart.c
> @@ -68,6 +68,7 @@
> #define AML_UART_BAUD_MASK 0x7fffff
> #define AML_UART_BAUD_USE BIT(23)
> #define AML_UART_BAUD_XTAL BIT(24)
> +#define AML_UART_BAUD_XTAL_DIV2 BIT(27)
>
> #define AML_UART_PORT_NUM 12
> #define AML_UART_PORT_OFFSET 6
> @@ -80,6 +81,10 @@ static struct uart_driver meson_uart_driver;
>
> static struct uart_port *meson_ports[AML_UART_PORT_NUM];
>
> +struct meson_uart_data {
> + bool has_xtal_div2;
> +};
> +
> static void meson_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
> {
> }
> @@ -293,13 +298,20 @@ static int meson_uart_startup(struct uart_port *port)
>
> static void meson_uart_change_speed(struct uart_port *port, unsigned long baud)
> {
> - u32 val;
> + const struct meson_uart_data *private_data = port->private_data;
> + u32 val = 0;
>
> while (!meson_uart_tx_empty(port))
> cpu_relax();
>
> if (port->uartclk == 24000000) {
> - val = DIV_ROUND_CLOSEST(port->uartclk / 3, baud) - 1;
> + unsigned int xtal_div = 3;
> +
> + if (private_data && private_data->has_xtal_div2) {
> + xtal_div = 2;
> + val |= AML_UART_BAUD_XTAL_DIV2;
> + }
> + val |= DIV_ROUND_CLOSEST(port->uartclk / xtal_div, baud) - 1;
> val |= AML_UART_BAUD_XTAL;
> } else {
> val = DIV_ROUND_CLOSEST(port->uartclk / 4, baud) - 1;
> @@ -749,6 +761,7 @@ static int meson_uart_probe(struct platform_device *pdev)
> port->x_char = 0;
> port->ops = &meson_uart_ops;
> port->fifosize = fifosize;
> + port->private_data = (void *)device_get_match_data(&pdev->dev);
>
> meson_ports[pdev->id] = port;
> platform_set_drvdata(pdev, port);
Reviewed-by: Neil Armstrong <narmstrong@...libre.com>
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