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Message-ID: <aa034975-0daa-f42c-d03b-cfa4a98fee45@quicinc.com>
Date:   Fri, 22 Apr 2022 19:12:11 +0530
From:   Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
To:     Matthias Kaehlcke <mka@...omium.org>
CC:     <agross@...nel.org>, <bjorn.andersson@...aro.org>,
        <robh+dt@...nel.org>, <linux-arm-msm@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <quic_rohkumar@...cinc.com>, <srinivas.kandagatla@...aro.org>,
        <dianders@...omium.org>, <swboyd@...omium.org>,
        <judyhsiao@...omium.org>,
        Venkata Prasad Potturu <quic_potturu@...cinc.com>
Subject: Re: [PATCH v9 02/12] arm64: dts: qcom: sc7280: Enable digital codecs
 and soundwire for CRD 1.0 and CRD 2.0


On 4/21/2022 9:47 PM, Matthias Kaehlcke wrote:
Thanks for your time Matthias!!!
> On Thu, Apr 21, 2022 at 08:17:29PM +0530, Srinivasa Rao Mandadapu wrote:
>
>> Subject: arm64: dts: qcom: sc7280: Enable digital codecs and soundwire for CRD 1.0 and CRD 2.0
> This also enables things for IDP boards, right? If that isn't intended
> then these changes should be in sc7280-crd-r3.dts
These changes are required for IDP boards also. Will update the commit 
message accordingly.
>
>> Enable rx, tx and va macro codecs and soundwire nodes on revision 3
>> and 4 (aka CRD 1.0 and 2.0) boards.
>>
>> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
>> Co-developed-by: Venkata Prasad Potturu <quic_potturu@...cinc.com>
>> Signed-off-by: Venkata Prasad Potturu <quic_potturu@...cinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 35 ++++++++++++++++++++++++++++++++
>>   1 file changed, 35 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> index 2f863c0..6cb5fc4 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> @@ -238,6 +238,19 @@
>>   	modem-init;
>>   };
>>   
>> +&lpass_rx_macro {
>> +	status = "okay";
>> +};
>> +
>> +&lpass_tx_macro {
>> +	status = "okay";
>> +};
>> +
>> +&lpass_va_macro {
>> +	status = "okay";
>> +	vdd-micb-supply = <&vreg_bob>;
>> +};
>> +
>>   &pcie1 {
>>   	status = "okay";
>>   	perst-gpio = <&tlmm 2 GPIO_ACTIVE_LOW>;
>> @@ -298,6 +311,28 @@
>>   	cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
>>   };
>>   
>> +&swr0 {
>> +	status = "okay";
>> +
>> +	wcd_rx: codec@0,4 {
>> +		compatible = "sdw20217010d00";
>> +		reg = <0 4>;
>> +		#sound-dai-cells = <1>;
>> +		qcom,rx-port-mapping = <1 2 3 4 5>;
>> +	};
>> +};
>> +
>> +&swr1 {
>> +	status = "okay";
>> +
>> +	wcd_tx: codec@0,3 {
>> +		compatible = "sdw20217010d00";
>> +		reg = <0 3>;
>> +		#sound-dai-cells = <1>;
>> +		qcom,tx-port-mapping = <1 2 3 4>;
>> +	};
>> +};
>> +
>>   &uart5 {
>>   	compatible = "qcom,geni-debug-uart";
>>   	status = "okay";
>> -- 
>> 2.7.4
>>

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