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Message-ID: <ef917fb9-ded2-6e4e-d3ca-f992fc6ae159@gmail.com>
Date: Fri, 22 Apr 2022 15:47:27 +0200
From: Matthias Brugger <matthias.bgg@...il.com>
To: Allen-KH Cheng <allen-kh.cheng@...iatek.com>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
Cc: Project_Global_Chrome_Upstream_Group@...iatek.com,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-mediatek@...ts.infradead.org,
Chen-Yu Tsai <wenst@...omium.org>,
Ryder Lee <ryder.lee@...nel.org>,
Hui Liu <hui.liu@...iatek.com>,
Irui Wang <irui.wang@...iatek.com>
Subject: Re: [PATCH 4/4] dt-bindings: media: mtk-vcodec: Add encoder power
domain property
On 21/04/2022 05:51, Allen-KH Cheng wrote:
> From: Irui Wang <irui.wang@...iatek.com>
>
> Add encoder power domain property
>
> Signed-off-by: Irui Wang <irui.wang@...iatek.com>
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@...iatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@...il.com>
> ---
> .../devicetree/bindings/media/mediatek,vcodec-encoder.yaml | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml
> index e7b65a91c92c..de2df6c6352c 100644
> --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml
> +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml
> @@ -41,6 +41,9 @@ properties:
>
> assigned-clock-parents: true
>
> + power-domains:
> + maxItems: 1
> +
> iommus:
> minItems: 1
> maxItems: 32
> @@ -74,6 +77,7 @@ required:
> - iommus
> - assigned-clocks
> - assigned-clock-parents
> + - power-domains
>
> allOf:
> - if:
> @@ -135,6 +139,7 @@ examples:
> #include <dt-bindings/clock/mt8173-clk.h>
> #include <dt-bindings/memory/mt8173-larb-port.h>
> #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/power/mt8173-power.h>
>
> vcodec_enc_avc: vcodec@...02000 {
> compatible = "mediatek,mt8173-vcodec-enc";
> @@ -156,6 +161,7 @@ examples:
> clock-names = "venc_sel";
> assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>;
> assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL>;
> + power-domains = <&scpsys MT8173_POWER_DOMAIN_VENC>;
> };
>
> vcodec_enc_vp8: vcodec@...02000 {
> @@ -176,4 +182,5 @@ examples:
> clock-names = "venc_lt_sel";
> assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>;
> assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>;
> + power-domains = <&scpsys MT8173_POWER_DOMAIN_VENC_LT>;
> };
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