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Message-Id: <20220422145147.2210587-3-sean.anderson@seco.com>
Date: Fri, 22 Apr 2022 10:51:40 -0400
From: Sean Anderson <sean.anderson@...o.com>
To: linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org
Cc: Andrew Lunn <andrew@...n.ch>, Rob Herring <robh+dt@...nel.org>,
Shawn Guo <shawnguo@...nel.org>, linux-kernel@...r.kernel.org,
Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Li Yang <leoyang.li@....com>, Michael Walle <michael@...le.cc>,
Sean Anderson <sean.anderson@...o.com>
Subject: [PATCH v2 2/9] dt-bindings: nvmem: sfp: Add clock properties
To program fuses, it is necessary to set the fuse programming time. This
is determined based on the value of the platform clock. Add a clock
property.
Signed-off-by: Sean Anderson <sean.anderson@...o.com>
---
(no changes since v1)
.../bindings/nvmem/fsl,layerscape-sfp.yaml | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml
index b7798e903191..54086f50157d 100644
--- a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml
+++ b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml
@@ -24,15 +24,29 @@ properties:
reg:
maxItems: 1
+ clocks:
+ maxItems: 1
+ description:
+ The SFP clock. Typically, this is the platform clock divided by 4.
+
+ clock-names:
+ const: sfp
+
required:
- compatible
- reg
+ - clock-names
+ - clocks
unevaluatedProperties: false
examples:
- |
+ #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
efuse@...0000 {
compatible = "fsl,ls1028a-sfp";
reg = <0x1e80000 0x8000>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(4)>;
+ clock-names = "sfp";
};
--
2.35.1.1320.gc452695387.dirty
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