linux-kernel - Re: [PATCH V3 12/17] dt-binding: mt8192: Add infra

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Message-ID: <e5b18654-ce83-44ee-e4c8-4cdfc4ceaa1d@linaro.org>
Date:   Sat, 23 Apr 2022 12:28:33 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Rex-BC Chen <rex-bc.chen@...iatek.com>, mturquette@...libre.com,
        sboyd@...nel.org, matthias.bgg@...il.com, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org
Cc:     p.zabel@...gutronix.de, angelogioacchino.delregno@...labora.com,
        chun-jie.chen@...iatek.com, wenst@...omium.org,
        runyang.chen@...iatek.com, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, linux-clk@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org,
        Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [PATCH V3 12/17] dt-binding: mt8192: Add infra_ao reset bit

On 22/04/2022 08:01, Rex-BC Chen wrote:
> To support reset of infra_ao, add the bit definition for thermal/PCIe/SVS.
> 
> Signed-off-by: Rex-BC Chen <rex-bc.chen@...iatek.com>
> ---
>  include/dt-bindings/reset/mt8192-resets.h | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/include/dt-bindings/reset/mt8192-resets.h b/include/dt-bindings/reset/mt8192-resets.h
> index be9a7ca245b9..d5f3433175c1 100644
> --- a/include/dt-bindings/reset/mt8192-resets.h
> +++ b/include/dt-bindings/reset/mt8192-resets.h
> @@ -27,4 +27,14 @@
>  
>  #define MT8192_TOPRGU_SW_RST_NUM				23
>  
> +/* INFRA RST0 */
> +#define MT8192_INFRA_RST0_LVTS_AP_RST				0
> +/* INFRA RST2 */
> +#define MT8192_INFRA_RST2_PCIE_PHY_RST				15
> +/* INFRA RST3 */
> +#define MT8192_INFRA_RST3_PTP_RST				5
> +/* INFRA RST4 */
> +#define MT8192_INFRA_RST4_LVTS_MCU				12
> +#define MT8192_INFRA_RST4_PCIE_TOP				1

These should be the IDs of reset, not some register values/offsets.
Therefore it is expected to have them incremented by 1.


> +
>  #endif  /* _DT_BINDINGS_RESET_CONTROLLER_MT8192 */


Best regards,
Krzysztof