linux-kernel - [PATCH V2 0/8] PCI: tegra: Add Tegra234 PCIe support

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Message-ID: <20220423124858.25946-1-vidyas@nvidia.com>
Date:   Sat, 23 Apr 2022 18:18:50 +0530
From:   Vidya Sagar <vidyas@...dia.com>
To:     <bhelgaas@...gle.com>, <lorenzo.pieralisi@....com>,
        <robh+dt@...nel.org>, <thierry.reding@...il.com>,
        <jonathanh@...dia.com>
CC:     <kishon@...com>, <vkoul@...nel.org>, <kw@...ux.com>,
        <krzk@...nel.org>, <p.zabel@...gutronix.de>,
        <mperttunen@...dia.com>, <linux-pci@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-tegra@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-phy@...ts.infradead.org>,
        <kthota@...dia.com>, <mmaddireddy@...dia.com>, <vidyas@...dia.com>,
        <sagar.tv@...il.com>
Subject: [PATCH V2 0/8] PCI: tegra: Add Tegra234 PCIe support

Tegra234 has a total of 11 PCIe controllers based on Synopsys DesignWare core.
There are three Universal PHY (UPHY) blocks (viz. HSIO, NVHS and GBE) with
each block supporting 8 lanes respectively. Controllers:0~4 use UPHY lanes
from HSIO block, Controllers:5,6 use UPHY lanes from NVHS block and
Controllers:7~10 use UPHY lanes from GBE block. Lane mapping in each block
is controlled in XBAR module by BPMP-FW. Since PCIe core has PIPE interface,
a glue module called PIPE-to-UPHY (P2U) is used to connect each UPHY lane
(applicable to all three UPHY bricks i.e. HSIO/NVHS/GBE) to PCIe controller.
This patch series
- Adds support for Tegra234 in the existing P2U PHY driver
- Adds support for Tegra234 in the existing PCIe platform controller driver
- Adds device tree nodes for all PCIe controllers
- Enables nodes applicable to P3737-0000 platform

Testing done on P3737-0000 platform
- PCIe link is up with on-board Broadcom WiFi controller

- PCIe link is up with an NVMe drive connected to M.2 Key-M slot and its
  functionality is verified

- PCIe link is up with a variety of cards (NICs and USB3.0 add-on cards)
  connected to CEM slot and their functionality is verified

V2:
* Dropped 3 patches that add clocks & resets IDs, power-domain IDs and
  memory IDs for PCIe controllers as the patches are already available
  in linux-next
* Based on Bjorn's review comment, reverted the commit b57256918399 ("PCI:
  tegra194: Rename tegra_pcie_dw to tegra194_pcie") and pushed it as a
  separate patch before adding support for T234 in the existing driver
* Addressed review comments from Rob for the other changes

Vidya Sagar (8):
  dt-bindings: PHY: P2U: Add support for Tegra234 P2U block
  dt-bindings: PCI: tegra: Add device tree support for Tegra234
  arm64: tegra: Add P2U and PCIe controller nodes to Tegra234 DT
  arm64: tegra: Enable PCIe slots in P3737-0000 board
  phy: tegra: Add PCIe PIPE2UPHY support for Tegra234
  PCI: Disable MSI for Tegra234 root ports
  Revert "PCI: tegra194: Rename tegra_pcie_dw to tegra194_pcie"
  PCI: tegra: Add Tegra234 PCIe support

 .../bindings/pci/nvidia,tegra194-pcie.txt     | 104 ++-
 .../bindings/phy/phy-tegra194-p2u.yaml        |  17 +-
 .../nvidia/tegra234-p3737-0000+p3701-0000.dts |  25 +
 arch/arm64/boot/dts/nvidia/tegra234.dtsi      | 775 ++++++++++++++++++
 drivers/pci/controller/dwc/pcie-tegra194.c    | 622 +++++++++-----
 drivers/pci/quirks.c                          |  13 +-
 drivers/phy/tegra/phy-tegra194-p2u.c          |  48 +-
 7 files changed, 1396 insertions(+), 208 deletions(-)

-- 
2.17.1