lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <YmQgi0i9PDCVqrGz@ripper>
Date:   Sat, 23 Apr 2022 08:51:39 -0700
From:   Bjorn Andersson <bjorn.andersson@...aro.org>
To:     Bhupesh Sharma <bhupesh.sharma@...aro.org>
Cc:     linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
        bhupesh.linux@...il.com, agross@...nel.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        robh+dt@...nel.org, vkoul@...nel.org, Rob Herring <robh@...nel.org>
Subject: Re: [PATCH v3 3/4] dt-bindings: phy: qcom,qmp: Describe phy@ subnode
 properly

On Mon 18 Apr 13:55 PDT 2022, Bhupesh Sharma wrote:

> Currently the qcom,qmp-phy dt-binding doesn't describe
> the 'reg' and '#phy-cells' properties for the phy@ subnode.
> 
> Fix the same.
> 
> Cc: Bjorn Andersson <bjorn.andersson@...aro.org>
> Cc: Rob Herring <robh@...nel.org>
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@...aro.org>
> ---
>  .../devicetree/bindings/phy/qcom,qmp-phy.yaml       | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml
> index 411c79dbfa15..c553c8ad0d1a 100644
> --- a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml
> @@ -118,6 +118,19 @@ patternProperties:
>        Each device node of QMP phy is required to have as many child nodes as
>        the number of lanes the PHY has.
>      properties:
> +      reg:
> +        minItems: 1
> +        maxItems: 6
> +        items:
> +          description: |
> +            List of offset and length pairs of register sets for PHY blocks.
> +            common block control registers, such as - SW_RESET, START_CTRL.
> +            pcs registers, such as - PCS_STATUS, POWER_DOWN_CONTROL,
> +            pcs misc registers, such as - PCS_MISC_TYPEC_CTRL.

The two cases we have is:

  tx
  rx
  pcs
  pcs_misc

and:

  tx
  rx
  pcs
  tx2
  rx2
  pcs_misc

So I think we should express that explicitly here.

Regards,
Bjorn

> +
> +      "#phy-cells":
> +        const: 0
> +
>        "#clock-cells":
>          enum: [ 0, 1, 2 ]
>  
> -- 
> 2.35.1
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ