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Message-ID: <20220423170235.2115479-5-nava.manne@xilinx.com>
Date: Sat, 23 Apr 2022 22:32:34 +0530
From: Nava kishore Manne <nava.manne@...inx.com>
To: <mdf@...nel.org>, <hao.wu@...el.com>, <yilun.xu@...el.com>,
<trix@...hat.com>, <michal.simek@...inx.com>,
<linux-fpga@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <git@...inx.com>
CC: Nava kishore Manne <nava.manne@...inx.com>
Subject: [PATCH v6 4/5] fpga: Use tab instead of space indentation
In FPGA Makefile has both space and tab indentation, to
make them align use tab instead of space indentation.
Signed-off-by: Nava kishore Manne <nava.manne@...inx.com>
Acked-by: Xu Yilun <yilun.xu@...el.com>
---
Changes for v2:
-None.
Changes for v3:
-Updated commit description.
Changes for v4:
-None.
Changes for v5:
-Updated commit description.
Changes for v6:
-None.
drivers/fpga/Makefile | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index 0bff783d1b61..5935b3d0abd5 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -18,9 +18,9 @@ obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o
obj-$(CONFIG_FPGA_MGR_XILINX_SPI) += xilinx-spi.o
obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o
obj-$(CONFIG_FPGA_MGR_ZYNQMP_FPGA) += zynqmp-fpga.o
-obj-$(CONFIG_FPGA_MGR_VERSAL_FPGA) += versal-fpga.o
-obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o
-obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o
+obj-$(CONFIG_FPGA_MGR_VERSAL_FPGA) += versal-fpga.o
+obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o
+obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o
# FPGA Bridge Drivers
obj-$(CONFIG_FPGA_BRIDGE) += fpga-bridge.o
--
2.25.1
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