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Message-ID: <32507f1d-b650-e2c9-2f04-1ac63c6774ec@linaro.org>
Date:   Sun, 24 Apr 2022 13:06:55 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Jonathan Bakker <xc-racer2@...e.ca>,
        Miquel Raynal <miquel.raynal@...tlin.com>
Cc:     Kyungmin Park <kyungmin.park@...sung.com>,
        Richard Weinberger <richard@....at>,
        Vignesh Raghavendra <vigneshr@...com>,
        linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-samsung-soc@...r.kernel.org,
        Tomasz Figa <tomasz.figa@...il.com>,
        Paweł Chmiel <pawel.mikolaj.chmiel@...il.com>
Subject: Re: [PATCH 4/5] mtd: onenand: samsung: Make sure that bus clock is
 enabled

On 23/04/2022 05:46, Jonathan Bakker wrote:
> From: Tomasz Figa <tomasz.figa@...il.com>
> 
> This patch adds basic handling of controller bus clock to make sure that
> in device probe it is enabled and device can operate correctly. The
> clock is optional and driver behavior is identical as before this patch
> if not provided.
> 
> Signed-off-by: Tomasz Figa <tomasz.figa@...il.com>
> Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@...il.com>
> Reviewed-by: Miquel Raynal <miquel.raynal@...tlin.com>
> Signed-off-by: Jonathan Bakker <xc-racer2@...e.ca>
> ---
>  drivers/mtd/nand/onenand/onenand_samsung.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/mtd/nand/onenand/onenand_samsung.c b/drivers/mtd/nand/onenand/onenand_samsung.c
> index a3ef4add865a..62014f8d27b6 100644
> --- a/drivers/mtd/nand/onenand/onenand_samsung.c
> +++ b/drivers/mtd/nand/onenand/onenand_samsung.c
> @@ -11,6 +11,7 @@
>   *	S5PC110: use DMA
>   */
>  
> +#include <linux/clk.h>
>  #include <linux/module.h>
>  #include <linux/platform_device.h>
>  #include <linux/sched.h>
> @@ -122,6 +123,7 @@ enum soc_type {
>  struct s3c_onenand {
>  	struct mtd_info	*mtd;
>  	struct platform_device	*pdev;
> +	struct clk	*clk_bus;
>  	enum soc_type	type;
>  	void __iomem	*ctrl_base;
>  	void __iomem	*chip_base;
> @@ -914,6 +916,10 @@ static int s3c_onenand_probe(struct platform_device *pdev)
>  		}
>  	}
>  
> +	onenand->clk_bus = devm_clk_get(&pdev->dev, "bus");

If it is optional, use optional clk API.

> +	if (!IS_ERR(onenand->clk_bus))
> +		clk_prepare_enable(onenand->clk_bus);
> +
>  	err = onenand_scan(mtd, 1);
>  	if (err)
>  		return err;

Error paths not updated.

Also what about other clocks?

I propose you should take over the authorship of the patch because it
will be more changes.

> @@ -945,6 +951,8 @@ static int s3c_onenand_remove(struct platform_device *pdev)
>  	struct mtd_info *mtd = platform_get_drvdata(pdev);
>  
>  	onenand_release(mtd);
> +	if (!IS_ERR(onenand->clk_bus))
> +		clk_disable_unprepare(onenand->clk_bus);
>  
>  	return 0;
>  }


Best regards,
Krzysztof

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