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Message-ID: <87fsm114ax.ffs@tglx>
Date: Mon, 25 Apr 2022 19:05:58 +0200
From: Thomas Gleixner <tglx@...utronix.de>
To: Adrian Hunter <adrian.hunter@...el.com>,
Peter Zijlstra <peterz@...radead.org>
Cc: Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Jiri Olsa <jolsa@...hat.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>,
"x86@...nel.org" <x86@...nel.org>,
"kvm@...r.kernel.org" <kvm@...r.kernel.org>,
H Peter Anvin <hpa@...or.com>,
Mathieu Poirier <mathieu.poirier@...aro.org>,
Suzuki K Poulose <suzuki.poulose@....com>,
Leo Yan <leo.yan@...aro.org>,
"jgross@...e.com" <jgross@...e.com>,
"sdeep@...are.com" <sdeep@...are.com>,
"pv-drivers@...are.com" <pv-drivers@...are.com>,
"pbonzini@...hat.com" <pbonzini@...hat.com>,
"seanjc@...gle.com" <seanjc@...gle.com>,
"kys@...rosoft.com" <kys@...rosoft.com>,
"sthemmin@...rosoft.com" <sthemmin@...rosoft.com>,
"virtualization@...ts.linux-foundation.org"
<virtualization@...ts.linux-foundation.org>,
"Andrew.Cooper3@...rix.com" <Andrew.Cooper3@...rix.com>,
"Hall, Christopher S" <christopher.s.hall@...el.com>
Subject: Re: [PATCH V2 03/11] perf/x86: Add support for TSC in nanoseconds
as a perf event clock
On Mon, Apr 25 2022 at 16:15, Adrian Hunter wrote:
> On 25/04/22 12:32, Thomas Gleixner wrote:
>> It's hillarious, that we still cling to this pvclock abomination, while
>> we happily expose TSC deadline timer to the guest. TSC virt scaling was
>> implemented in hardware for a reason.
>
> So you are talking about changing VMX TCS Offset on every VM-Entry to try to hide
> the time jumps when the VM is scheduled out? Or neglect that and just let the time
> jumps happen?
>
> If changing VMX TCS Offset, how can TSC be kept consistent between each VCPU i.e.
> wouldn't that mean each VCPU has to have the same VMX TSC Offset?
Obviously so. That's the only thing which makes sense, no?
Thanks,
tglx
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