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Message-ID: <94435133-b875-3005-ab23-dc4457ec9002@linaro.org>
Date:   Tue, 26 Apr 2022 01:11:13 +0300
From:   Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To:     Bjorn Andersson <bjorn.andersson@...aro.org>,
        Rob Clark <robdclark@...il.com>,
        Abhinav Kumar <quic_abhinavk@...cinc.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>
Cc:     Sean Paul <sean@...rly.run>, David Airlie <airlied@...ux.ie>,
        Daniel Vetter <daniel@...ll.ch>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
        freedreno@...ts.freedesktop.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 2/2] drm/msm/dpu: Issue MDSS reset during
 initialization

On 21/04/2022 07:15, Bjorn Andersson wrote:
> It's typical for the bootloader to bring up the display for showing a
> boot splash or efi framebuffer. But in some cases the kernel driver ends
> up only partially configuring (in particular) the DPU, which might
> result in e.g. that two different data paths attempts to push data to
> the interface - with resulting graphical artifacts.
> 
> Naturally the end goal would be to inherit the bootloader's
> configuration and provide the user with a glitch free handover from the
> boot configuration to a running DPU.
> 
> But as implementing seamless transition from the bootloader
> configuration to the running OS will be a considerable effort, start by
> simply resetting the entire MDSS to its power-on state, to avoid the
> partial configuration.
> 
> Signed-off-by: Bjorn Andersson <bjorn.andersson@...aro.org>

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>

> ---
> 
> Changes since v3:
> - Rebased upon the mdss dpu/mdp restructuring (https://patchwork.freedesktop.org/series/98525/)
> 
>   drivers/gpu/drm/msm/msm_mdss.c | 32 ++++++++++++++++++++++++++++++++
>   1 file changed, 32 insertions(+)
> 
> diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
> index f6f0d0fa5ab2..20f154dda9cf 100644
> --- a/drivers/gpu/drm/msm/msm_mdss.c
> +++ b/drivers/gpu/drm/msm/msm_mdss.c
> @@ -4,11 +4,13 @@
>    */
>   
>   #include <linux/clk.h>
> +#include <linux/delay.h>
>   #include <linux/irq.h>
>   #include <linux/irqchip.h>
>   #include <linux/irqdesc.h>
>   #include <linux/irqchip/chained_irq.h>
>   #include <linux/pm_runtime.h>
> +#include <linux/reset.h>
>   
>   #include "msm_drv.h"
>   #include "msm_kms.h"
> @@ -193,6 +195,32 @@ static void msm_mdss_destroy(struct msm_mdss *msm_mdss)
>   	irq_set_chained_handler_and_data(irq, NULL, NULL);
>   }
>   
> +static int msm_mdss_reset(struct device *dev)
> +{
> +	struct reset_control *reset;
> +
> +	reset = reset_control_get_optional_exclusive(dev, NULL);
> +	if (!reset) {
> +		/* Optional reset not specified */
> +		return 0;
> +	} else if (IS_ERR(reset)) {
> +		return dev_err_probe(dev, PTR_ERR(reset),
> +				     "failed to acquire mdss reset\n");
> +	}
> +
> +	reset_control_assert(reset);
> +	/*
> +	 * Tests indicate that reset has to be held for some period of time,
> +	 * make it one frame in a typical system
> +	 */
> +	msleep(20);
> +	reset_control_deassert(reset);
> +
> +	reset_control_put(reset);
> +
> +	return 0;
> +}
> +
>   /*
>    * MDP5 MDSS uses at most three specified clocks.
>    */
> @@ -229,6 +257,10 @@ static struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5
>   	int ret;
>   	int irq;
>   
> +	ret = msm_mdss_reset(&pdev->dev);
> +	if (ret)
> +		return ERR_PTR(ret);
> +
>   	msm_mdss = devm_kzalloc(&pdev->dev, sizeof(*msm_mdss), GFP_KERNEL);
>   	if (!msm_mdss)
>   		return ERR_PTR(-ENOMEM);


-- 
With best wishes
Dmitry

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