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Date: Mon, 25 Apr 2022 10:13:19 +0530
From: Ravi Bangoria <ravi.bangoria@....com>
To: <peterz@...radead.org>, <acme@...nel.org>
CC: <ravi.bangoria@....com>, <mingo@...hat.com>,
<mark.rutland@....com>, <jolsa@...nel.org>, <namhyung@...nel.org>,
<tglx@...utronix.de>, <bp@...en8.de>, <irogers@...gle.com>,
<yao.jin@...ux.intel.com>, <james.clark@....com>,
<leo.yan@...aro.org>, <kan.liang@...ux.intel.com>,
<ak@...ux.intel.com>, <eranian@...gle.com>,
<like.xu.linux@...il.com>, <x86@...nel.org>,
<linux-perf-users@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<sandipan.das@....com>, <ananth.narayan@....com>,
<kim.phillips@....com>, <rrichter@....com>,
<santosh.shukla@....com>
Subject: [PATCH 2/6] perf/amd/ibs: Advertise zen4_ibs_extensions as pmu capability attribute
PMU driver can advertise certain feature via capability attribute('caps'
sysfs directory) which can be consumed by userspace tools like perf. Add
zen4_ibs_extensions capability attribute for IBS pmus. This attribute
will be enabled when CPUID_Fn8000001B_EAX[11] is set.
Without patch:
$ ls /sys/bus/event_source/devices/ibs_op/caps
ls: cannot access '/sys/.../ibs_op/caps': No such file or directory
With patch:
$ ls /sys/bus/event_source/devices/ibs_op/caps
zen4_ibs_extensions
Signed-off-by: Ravi Bangoria <ravi.bangoria@....com>
---
arch/x86/events/amd/ibs.c | 34 ++++++++++++++++++++++++++++------
1 file changed, 28 insertions(+), 6 deletions(-)
diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
index a5303d62060c..54e12bd7843e 100644
--- a/arch/x86/events/amd/ibs.c
+++ b/arch/x86/events/amd/ibs.c
@@ -95,8 +95,10 @@ struct perf_ibs {
struct cpu_perf_ibs __percpu *pcpu;
struct attribute **format_attrs;
+ struct attribute **caps_attrs;
struct attribute_group format_group;
- const struct attribute_group *attr_groups[2];
+ struct attribute_group caps_group;
+ const struct attribute_group *attr_groups[3];
u64 (*get_count)(u64 config);
};
@@ -522,10 +524,13 @@ PMU_FORMAT_ATTR(rand_en, "config:57");
PMU_FORMAT_ATTR(cnt_ctl, "config:19");
PMU_EVENT_ATTR_STRING(l3missonly, fetch_l3missonly, "config:59");
PMU_EVENT_ATTR_STRING(l3missonly, op_l3missonly, "config:16");
+PMU_EVENT_ATTR_STRING(zen4_ibs_extensions, zen4_ibs_extensions, "1");
/* size = nr attrs plus NULL at the end */
static struct attribute *ibs_fetch_format_attrs[3];
static struct attribute *ibs_op_format_attrs[3];
+static struct attribute *ibs_fetch_caps_attrs[2];
+static struct attribute *ibs_op_caps_attrs[2];
static struct perf_ibs perf_ibs_fetch = {
.pmu = {
@@ -548,6 +553,7 @@ static struct perf_ibs perf_ibs_fetch = {
.offset_mask = { MSR_AMD64_IBSFETCH_REG_MASK },
.offset_max = MSR_AMD64_IBSFETCH_REG_COUNT,
.format_attrs = ibs_fetch_format_attrs,
+ .caps_attrs = ibs_fetch_caps_attrs,
.get_count = get_ibs_fetch_count,
};
@@ -574,6 +580,7 @@ static struct perf_ibs perf_ibs_op = {
.offset_mask = { MSR_AMD64_IBSOP_REG_MASK },
.offset_max = MSR_AMD64_IBSOP_REG_COUNT,
.format_attrs = ibs_op_format_attrs,
+ .caps_attrs = ibs_op_caps_attrs,
.get_count = get_ibs_op_count,
};
@@ -728,6 +735,7 @@ static __init int perf_ibs_pmu_init(struct perf_ibs *perf_ibs, char *name)
{
struct cpu_perf_ibs __percpu *pcpu;
int ret;
+ int i = 0;
pcpu = alloc_percpu(struct cpu_perf_ibs);
if (!pcpu)
@@ -736,16 +744,26 @@ static __init int perf_ibs_pmu_init(struct perf_ibs *perf_ibs, char *name)
perf_ibs->pcpu = pcpu;
/* register attributes */
+ memset(&perf_ibs->attr_groups, 0, sizeof(perf_ibs->attr_groups));
if (perf_ibs->format_attrs[0]) {
memset(&perf_ibs->format_group, 0, sizeof(perf_ibs->format_group));
- perf_ibs->format_group.name = "format";
- perf_ibs->format_group.attrs = perf_ibs->format_attrs;
+ perf_ibs->format_group.name = "format";
+ perf_ibs->format_group.attrs = perf_ibs->format_attrs;
- memset(&perf_ibs->attr_groups, 0, sizeof(perf_ibs->attr_groups));
- perf_ibs->attr_groups[0] = &perf_ibs->format_group;
- perf_ibs->pmu.attr_groups = perf_ibs->attr_groups;
+ perf_ibs->attr_groups[i++] = &perf_ibs->format_group;
}
+ if (perf_ibs->caps_attrs[0]) {
+ memset(&perf_ibs->caps_group, 0, sizeof(perf_ibs->caps_group));
+ perf_ibs->caps_group.name = "caps";
+ perf_ibs->caps_group.attrs = perf_ibs->caps_attrs;
+
+ perf_ibs->attr_groups[i++] = &perf_ibs->caps_group;
+ }
+
+ if (i)
+ perf_ibs->pmu.attr_groups = perf_ibs->attr_groups;
+
ret = perf_pmu_register(&perf_ibs->pmu, name, -1);
if (ret) {
perf_ibs->pcpu = NULL;
@@ -758,6 +776,7 @@ static __init int perf_ibs_pmu_init(struct perf_ibs *perf_ibs, char *name)
static __init void perf_ibs_fetch_prepare(void)
{
struct attribute **format_attrs = perf_ibs_fetch.format_attrs;
+ struct attribute **caps_attr = perf_ibs_fetch.caps_attrs;
/*
* Some chips fail to reset the fetch count when it is written; instead
@@ -773,6 +792,7 @@ static __init void perf_ibs_fetch_prepare(void)
if (ibs_caps & IBS_CAPS_ZEN4IBSEXTENSIONS) {
perf_ibs_fetch.config_mask |= IBS_FETCH_L3MISSONLY;
*format_attrs++ = &fetch_l3missonly.attr.attr;
+ *caps_attr++ = &zen4_ibs_extensions.attr.attr;
}
perf_ibs_pmu_init(&perf_ibs_fetch, "ibs_fetch");
@@ -781,6 +801,7 @@ static __init void perf_ibs_fetch_prepare(void)
static __init void perf_ibs_op_prepare(void)
{
struct attribute **format_attrs = perf_ibs_op.format_attrs;
+ struct attribute **caps_attr = perf_ibs_op.caps_attrs;
if (ibs_caps & IBS_CAPS_OPCNT) {
perf_ibs_op.config_mask |= IBS_OP_CNT_CTL;
@@ -796,6 +817,7 @@ static __init void perf_ibs_op_prepare(void)
if (ibs_caps & IBS_CAPS_ZEN4IBSEXTENSIONS) {
perf_ibs_op.config_mask |= IBS_OP_L3MISSONLY;
*format_attrs++ = &op_l3missonly.attr.attr;
+ *caps_attr++ = &zen4_ibs_extensions.attr.attr;
}
perf_ibs_pmu_init(&perf_ibs_op, "ibs_op");
--
2.27.0
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