lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <94786075-d0b4-a067-ae08-b696a120ac98@huawei.com>
Date:   Mon, 25 Apr 2022 09:14:11 +0100
From:   John Garry <john.garry@...wei.com>
To:     "huangguangbin (A)" <huangguangbin2@...wei.com>,
        "will@...nel.org" <will@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>
CC:     "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Linuxarm <linuxarm@...wei.com>,
        "liuqi (BA)" <liuqi115@...wei.com>,
        Zhangshaokun <zhangshaokun@...ilicon.com>,
        "Fangjian (Jay)" <f.fangjian@...wei.com>,
        "lipeng (Y)" <lipeng321@...wei.com>,
        "shenjian (K)" <shenjian15@...wei.com>,
        moyufeng <moyufeng@...wei.com>
Subject: Re: [PATCH V3 2/2] drivers/perf: hisi: add driver for HNS3 PMU


>>> +F:    drivers/perf/hisilicon/hns3_pmu.c
>>> +
>>>   HISILICON QM AND ZIP Controller DRIVER
>>>   M:    Zhou Wang <wangzhou1@...ilicon.com>
>>>   L:    linux-crypto@...r.kernel.org
>>> diff --git a/drivers/perf/hisilicon/Kconfig 
>>> b/drivers/perf/hisilicon/Kconfig
>>> index 5546218b5598..171bfc1b6bc2 100644
>>> --- a/drivers/perf/hisilicon/Kconfig
>>> +++ b/drivers/perf/hisilicon/Kconfig
>>> @@ -14,3 +14,13 @@ config HISI_PCIE_PMU
>>>         RCiEP devices.
>>>         Adds the PCIe PMU into perf events system for monitoring 
>>> latency,
>>>         bandwidth etc.
>>> +
>>> +config HNS3_PMU
>>> +    tristate "HNS3 PERF PMU"
>>> +    depends on ARM64 || COMPILE_TEST
>>
>> is see hns3_pmu_readq() below, so you need to ensure the arch supports 
>> readq - so I think that you need to depend on 64b. I assume that you 
>> never built this for a 32b arch
>>
> Our CPU arch is just arm64, so I set it to depend on ARM64. Yeah, I 
> never built this for a 32b arch because we would never run this driver 
> on 32b CPU.
> Are you mean that hns3_pmu_readq() will be compiled failed for 32b arch?

Yes. That is the point of COMPILE_TEST - we may compile for other 
architectures (even though in they will never been seen in reality on 
other architectures). For me I find it useful to test compile drivers 
for HW only seen on arm machines from my x86 machine without cross 
compiling.

 > So I think that I need to delete COMPILE_TEST to prevent from this case.

No, please keep it. So I think you have 2x options:
- Add additional Kconfig dependency on CONFIG_64BIT
- include io-64-nonatomic-hi-lo.h

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ