linux-kernel - Re: [PATCH V3 11/17] dt-bindings: arm: mediatek: Add #reset-cells property for MT8192-sys-clock

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Date:   Mon, 25 Apr 2022 10:37:02 +0800
From:   Rex-BC Chen <rex-bc.chen@...iatek.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        "mturquette@...libre.com" <mturquette@...libre.com>,
        "sboyd@...nel.org" <sboyd@...nel.org>,
        "matthias.bgg@...il.com" <matthias.bgg@...il.com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>
CC:     "p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
        "angelogioacchino.delregno@...labora.com" 
        <angelogioacchino.delregno@...labora.com>,
        Chun-Jie Chen (陳浚桀) 
        <Chun-Jie.Chen@...iatek.com>,
        "wenst@...omium.org" <wenst@...omium.org>,
        Runyang Chen (陈润洋) 
        <Runyang.Chen@...iatek.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-mediatek@...ts.infradead.org" 
        <linux-mediatek@...ts.infradead.org>,
        Project_Global_Chrome_Upstream_Group 
        <Project_Global_Chrome_Upstream_Group@...iatek.com>
Subject: Re: [PATCH V3 11/17] dt-bindings: arm: mediatek: Add #reset-cells
 property for MT8192-sys-clock

On Sat, 2022-04-23 at 18:27 +0800, Krzysztof Kozlowski wrote:
> On 22/04/2022 08:01, Rex-BC Chen wrote:
> > We will use the infra_ao reset which is defined in mt8192-sys-
> > clock.
> > The maximum value of reset-cells is 2. Therefore, we add this patch
> > to
> > define it.
> 
> Remove entire last sentence, does not make sense in the commit.
> 

Hello Krzysztof,

Thanks for your review.
I will drop "Therefore, we add this patch to define it." and add more
detailed messages in next version.

> > 
> > Signed-off-by: Rex-BC Chen <rex-bc.chen@...iatek.com>
> > ---
> >  .../bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml       | 3
> > +++
> >  1 file changed, 3 insertions(+)
> > 
> > diff --git
> > a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-
> > sys-clock.yaml
> > b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-
> > sys-clock.yaml
> > index 5705bcf1fe47..28ebcecc8258 100644
> > ---
> > a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-
> > sys-clock.yaml
> > +++
> > b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-
> > sys-clock.yaml
> > @@ -29,6 +29,9 @@ properties:
> >    '#clock-cells':
> >      const: 1
> >  
> > +  '#reset-cells':
> > +    maximum: 2
> 
> Why this is a maximum? Usually this is const, so how do you use it
> (with
> what values)?
> 
We need to let the driver compatible with previous setting in
drivers/clk/mediatek/reset.c

There are two use cases in our reset driver:
(Refer to [1])

1. #reset-cells = <1>
   When we input the argument, the older driver
use is to calculate  
   bank and bit by different method. From the implementation of
   reset_xlate(), we can see if the argument number is 1, it will
   return directly.

2. #reset-cells = <2>
   The input arguments is offset and bit. When we input two arguments,
   we can use reset_xlate() to calculate the corresponding id to assert
   and deassert.

[1]:
https://lore.kernel.org/all/20220422060152.13534-10-rex-bc.chen@mediatek.com/

If it's acceptable, I will add this in commit message.

BRs,
Rex
> > +
> >  required:
> >    - compatible
> >    - reg
> 
> 
> Best regards,
> Krzysztof