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Message-Id: <9F8BCBA8-5EE3-4F87-9518-91CB7AB4E077@cutebit.org>
Date: Mon, 25 Apr 2022 14:34:33 +0200
From: Martin Povišer <povik@...ebit.org>
To: Mark Brown <broonie@...nel.org>
Cc: Martin Povišer <povik+lin@...ebit.org>,
Liam Girdwood <lgirdwood@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Jaroslav Kysela <perex@...ex.cz>,
Takashi Iwai <tiwai@...e.com>, alsa-devel@...a-project.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Mark Kettenis <kettenis@...nbsd.org>,
Hector Martin <marcan@...can.st>,
Sven Peter <sven@...npeter.dev>
Subject: Re: [RFC PATCH 3/5] HACK: ASoC: Tolerate N-cpus-to-M-codecs links
> On 25. 4. 2022, at 14:25, Mark Brown <broonie@...nel.org> wrote:
>
> On Fri, Apr 22, 2022 at 04:06:06PM +0200, Martin Povišer wrote:
>>> On 4. 4. 2022, at 14:28, Mark Brown <broonie@...nel.org> wrote:
>
>>> We need to figure out an interface for describing which CODEC/CPU
>>> combinations are connected to each other. I'm not seeing a great way to
>>> do that right now, probably some side data table is going to be needed,
>>> or perhaps the CPU DAI drivers can be persuaded to only have one DAI
>>> actually register and claim to support more channels? I'm not sure how
>>> a configuraiton like this is going to work at userspace level if the
>>> multiple CPU DAIs end up being visible...
>
>> To understand the issue better: How could the multiple CPU DAIs be
>> visible from userspace?
>
> If you register two separate DAIs (well, links) with the API without
> doing anything else the API will just expose them to userspace as two
> separate things with no indication that they're related.
Sure, but what I am addressing here is a single DAI link with multiple
CPU DAIs, invoked in DT like this:
dai-link@0 {
link-name = "Speakers";
mclk-fs = <256>;
cpu {
sound-dai = <&mca 0>, <&mca 1>;
};
codec {
sound-dai = <&speaker_left_woof1>,
<&speaker_right_woof1>,
<&speaker_left_tweet>,
<&speaker_right_tweet>,
<&speaker_left_woof2>,
<&speaker_right_woof2>;
};
};
>> What about this interim solution: In case of N-to-M links we put in
>> the most restrictive condition for checking capture/playback stream
>> validity: we check all of the CPU DAIs. Whatever ends up being the
>> proper solution later can only be less restrictive than this.
>
> That's not the issue here?
Well to me it looks like it is. Because if I invoke the DAI link like
I quoted above, and the platform driver supports it, the playback/capture
stream validity check is the only place it breaks down. Notwithstanding
this may be the wrong API as you wrote.
>> As a reminder what happens on the Macs: the platform driver drives
>> all the CPU-side I2S ports that belong to the link with the same data,
>> so the particular CPU/CODEC wiring doesn’t matter.
>
> Oh, that's not something I was aware of. In that case this is the wrong
> API - you should be using DPCM to map one front end onto multiple back
> ends (Kirkwood does something similar IIRC, there will be other examples
> but that's probably the simplest). The back ends probably don't really
> need to know that they're on the same physical bus (if indeed they are).
I guess I need to look into that.
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