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Message-ID: <5a927c06-92af-4608-cb74-eb53a12248d7@collabora.com>
Date: Tue, 26 Apr 2022 11:34:12 +0200
From: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
To: Rex-BC Chen <rex-bc.chen@...iatek.com>, mturquette@...libre.com,
sboyd@...nel.org, matthias.bgg@...il.com, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org
Cc: p.zabel@...gutronix.de, chun-jie.chen@...iatek.com,
wenst@...omium.org, runyang.chen@...iatek.com,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org,
Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [PATCH V3 05/17] clk: mediatek: reset: Merge and revise reset
register function
Il 22/04/22 08:01, Rex-BC Chen ha scritto:
> There are two versions for clock reset register control of MediaTek
> SoCs. The old hardware is one bit per reset control, and does not
> have separate registers for bit set, clear and read-back operations.
> This matches the scheme supported by the simple reset driver.
>
> However, because we need to use our data structure "struct mtk_reset",
> we can not use the operation of simple reset driver. We keep the
> original functions and name this version as "MTK_RST_SIMPLE".
>
> In this patch:
> - Add a version enum to separate different MediaTek reset hardware.
> - Merge the reset register function of simple and set_clr into one
> function "mtk_register_reset_controller".
> - Rename input variable "num_regs" to "rst_set_nr" to avoid
> confusion. This variable is used to define the number of reset set.
> - Rename "regofs" to "reg_ofs".
> - Adjust delaration type for mtk_register_reset_controller().
>
> Signed-off-by: Rex-BC Chen <rex-bc.chen@...iatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
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