linux-kernel - RE: [PATCH v2 1/7] reset: imx7: Add the iMX8MP PCIe PHY PERST support

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Message-ID: <AS8PR04MB8676E0AEEB88F79BDFF276438CFB9@AS8PR04MB8676.eurprd04.prod.outlook.com>
Date:   Tue, 26 Apr 2022 03:27:39 +0000
From:   Hongxing Zhu <hongxing.zhu@....com>
To:     Philipp Zabel <p.zabel@...gutronix.de>,
        "l.stach@...gutronix.de" <l.stach@...gutronix.de>,
        "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
        "robh@...nel.org" <robh@...nel.org>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "vkoul@...nel.org" <vkoul@...nel.org>,
        "alexander.stein@...tq-group.com" <alexander.stein@...tq-group.com>
CC:     "linux-phy@...ts.infradead.org" <linux-phy@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "kernel@...gutronix.de" <kernel@...gutronix.de>,
        dl-linux-imx <linux-imx@....com>
Subject: RE: [PATCH v2 1/7] reset: imx7: Add the iMX8MP PCIe PHY PERST support

Hi Philipp:

> -----Original Message-----
> From: Hongxing Zhu
> Sent: 2022年4月15日 15:33
> To: Philipp Zabel <p.zabel@...gutronix.de>; l.stach@...gutronix.de;
> bhelgaas@...gle.com; lorenzo.pieralisi@....com; robh@...nel.org;
> shawnguo@...nel.org; vkoul@...nel.org; alexander.stein@...tq-group.com
> Cc: linux-phy@...ts.infradead.org; devicetree@...r.kernel.org;
> linux-pci@...r.kernel.org; linux-arm-kernel@...ts.infradead.org;
> linux-kernel@...r.kernel.org; kernel@...gutronix.de; dl-linux-imx
> <linux-imx@....com>
> Subject: RE: [PATCH v2 1/7] reset: imx7: Add the iMX8MP PCIe PHY PERST
> support
> 
> Hi Philipp:
> 
> > -----Original Message-----
> > From: Philipp Zabel <p.zabel@...gutronix.de>
> > Sent: 2022年4月4日 17:34
> > To: Hongxing Zhu <hongxing.zhu@....com>; l.stach@...gutronix.de;
> > bhelgaas@...gle.com; lorenzo.pieralisi@....com; robh@...nel.org;
> > shawnguo@...nel.org; vkoul@...nel.org; alexander.stein@...tq-group.com
> > Cc: linux-phy@...ts.infradead.org; devicetree@...r.kernel.org;
> > linux-pci@...r.kernel.org; linux-arm-kernel@...ts.infradead.org;
> > linux-kernel@...r.kernel.org; kernel@...gutronix.de; dl-linux-imx
> > <linux-imx@....com>
> > Subject: Re: [PATCH v2 1/7] reset: imx7: Add the iMX8MP PCIe PHY PERST
> > support
> >
> > Hi Richard,
> >
> > On Mo, 2022-03-07 at 17:07 +0800, Richard Zhu wrote:
> > > Add the i.MX8MP PCIe PHY PERST support.
> > >
> > > Signed-off-by: Richard Zhu <hongxing.zhu@....com>
> > > ---
> > >  drivers/reset/reset-imx7.c | 1 +
> > >  1 file changed, 1 insertion(+)
> > >
> > > diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
> > > index 185a333df66c..d2408725eb2c 100644
> > > --- a/drivers/reset/reset-imx7.c
> > > +++ b/drivers/reset/reset-imx7.c
> > > @@ -329,6 +329,7 @@ static int imx8mp_reset_set(struct
> > > reset_controller_dev *rcdev,
> > >                 break;
> > >
> > >         case IMX8MP_RESET_PCIE_CTRL_APPS_EN:
> > > +       case IMX8MP_RESET_PCIEPHY_PERST:
> > >                 value = assert ? 0 : bit;
> > >                 break;
> > >         }
> >
> > This doesn't do what the commit description says.
> >
> > The PCIEPHY_PERST bit is already supported by the driver (albeit
> > incorrectly?) - this patch just inverts the bit.
> >
> > Since this bit is not inverted on the other platforms, and the i.MX8MP
> > reference manual says nothing about this, please explicitly state why
> > this needs to be inverted and call it a fix in the commit description.
> Thanks for your comments, and sorry for replying late.
> I didn't get more details about this bit difference between i.MX8MP and
> others.
> Let me consult with design team again, and back to you later.

I got some details of this PERST bit(BIT3) of SRC_PCIEPHY_RCR.
The initialized default value of this bit is 1b'1 on i.MX7/iMX8MM/iMX8MQ.
But unfortunately, the i.MX8MP has one inverted default value 1b'0 of this bit.

And this bit should be kept 1b'1 after power and clocks are stable.
So, I assert/de-assert this bit on i.MX8MP only.

Best Regards
Richard Zhu

> 
> Best Regards
> Richard Zhu
> 
> >
> > regards
> > Philipp