linux-kernel - Re: [PATCH] drm/amd/display: protect remaining FPU-code calls on dcn3.1.x

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Message-ID: <fed8e5e1-18ea-cc68-328c-3d36c5ff98d2@amd.com>
Date:   Tue, 26 Apr 2022 12:23:10 -0400
From:   Rodrigo Siqueira Jordao <Rodrigo.Siqueira@....com>
To:     Melissa Wen <mwen@...lia.com>, harry.wentland@....com,
        sunpeng.li@....com, alexander.deucher@....com,
        christian.koenig@....com, Xinhui.Pan@....com, airlied@...ux.ie,
        daniel@...ll.ch
Cc:     Qingqing Zhuo <qingqing.zhuo@....com>,
        Dmytro Laktyushkin <Dmytro.Laktyushkin@....com>,
        Jasdeep Dhillon <jdhillon@....com>,
        chandan.vurdigerenataraj@....com, amd-gfx@...ts.freedesktop.org,
        dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] drm/amd/display: protect remaining FPU-code calls on
 dcn3.1.x



On 2022-03-30 19:02, Melissa Wen wrote:
>  From [1], I realized two other calls to dcn30 code are associated with
> FPU operations and are not protected by DC_FP_* macros:
> * dcn30_populate_dml_writeback_from_context()
> * dcn30_set_mcif_arb_params()
> 
> So, since FPU-associated code is not fully isolated in dcn30, and
> dcn3.1.x reuses them, let's wrap their calls properly.
> 
> Note: this patch complements the fix from [1].
> 
> [1] https://lore.kernel.org/amd-gfx/20220329082957.1662655-1-chandan.vurdigerenataraj@amd.com/
> 
> Signed-off-by: Melissa Wen <mwen@...lia.com>
> ---
>   .../drm/amd/display/dc/dcn31/dcn31_resource.c | 25 +++++++++++++++++--
>   .../drm/amd/display/dc/dcn31/dcn31_resource.h |  9 +++++++
>   .../amd/display/dc/dcn315/dcn315_resource.c   |  4 +--
>   .../amd/display/dc/dcn316/dcn316_resource.c   |  4 +--
>   4 files changed, 36 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
> index bf130b2435ab..afdfec74ed08 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
> @@ -1735,6 +1735,27 @@ void dcn31_calculate_wm_and_dlg(
>   	DC_FP_END();
>   }
>   
> +void
> +dcn31_populate_dml_writeback_from_context(struct dc *dc,
> +					  struct resource_context *res_ctx,
> +					  display_e2e_pipe_params_st *pipes)
> +{
> +	DC_FP_START();
> +	dcn30_populate_dml_writeback_from_context(dc, res_ctx, pipes);
> +	DC_FP_END();
> +}
> +
> +void
> +dcn31_set_mcif_arb_params(struct dc *dc,
> +			  struct dc_state *context,
> +			  display_e2e_pipe_params_st *pipes,
> +			  int pipe_cnt)
> +{
> +	DC_FP_START();
> +	dcn30_set_mcif_arb_params(dc, context, pipes, pipe_cnt);
> +	DC_FP_END();
> +}
> +
>   bool dcn31_validate_bandwidth(struct dc *dc,
>   		struct dc_state *context,
>   		bool fast_validate)
> @@ -1806,8 +1827,8 @@ static struct resource_funcs dcn31_res_pool_funcs = {
>   	.add_stream_to_ctx = dcn30_add_stream_to_ctx,
>   	.add_dsc_to_stream_resource = dcn20_add_dsc_to_stream_resource,
>   	.remove_stream_from_ctx = dcn20_remove_stream_from_ctx,
> -	.populate_dml_writeback_from_context = dcn30_populate_dml_writeback_from_context,
> -	.set_mcif_arb_params = dcn30_set_mcif_arb_params,
> +	.populate_dml_writeback_from_context = dcn31_populate_dml_writeback_from_context,
> +	.set_mcif_arb_params = dcn31_set_mcif_arb_params,
>   	.find_first_free_match_stream_enc_for_link = dcn10_find_first_free_match_stream_enc_for_link,
>   	.acquire_post_bldn_3dlut = dcn30_acquire_post_bldn_3dlut,
>   	.release_post_bldn_3dlut = dcn30_release_post_bldn_3dlut,
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.h b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.h
> index 1ce6509c1ed1..393458015d6a 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.h
> +++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.h
> @@ -50,6 +50,15 @@ int dcn31_populate_dml_pipes_from_context(
>   	struct dc *dc, struct dc_state *context,
>   	display_e2e_pipe_params_st *pipes,
>   	bool fast_validate);
> +void
> +dcn31_populate_dml_writeback_from_context(struct dc *dc,
> +					  struct resource_context *res_ctx,
> +					  display_e2e_pipe_params_st *pipes);
> +void
> +dcn31_set_mcif_arb_params(struct dc *dc,
> +			  struct dc_state *context,
> +			  display_e2e_pipe_params_st *pipes,
> +			  int pipe_cnt);
>   void dcn31_update_soc_for_wm_a(struct dc *dc, struct dc_state *context);
>   
>   struct resource_pool *dcn31_create_resource_pool(
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c b/drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c
> index fadb89326999..06dd064e5997 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c
> @@ -1726,8 +1726,8 @@ static struct resource_funcs dcn315_res_pool_funcs = {
>   	.add_stream_to_ctx = dcn30_add_stream_to_ctx,
>   	.add_dsc_to_stream_resource = dcn20_add_dsc_to_stream_resource,
>   	.remove_stream_from_ctx = dcn20_remove_stream_from_ctx,
> -	.populate_dml_writeback_from_context = dcn30_populate_dml_writeback_from_context,
> -	.set_mcif_arb_params = dcn30_set_mcif_arb_params,
> +	.populate_dml_writeback_from_context = dcn31_populate_dml_writeback_from_context,
> +	.set_mcif_arb_params = dcn31_set_mcif_arb_params,
>   	.find_first_free_match_stream_enc_for_link = dcn10_find_first_free_match_stream_enc_for_link,
>   	.acquire_post_bldn_3dlut = dcn30_acquire_post_bldn_3dlut,
>   	.release_post_bldn_3dlut = dcn30_release_post_bldn_3dlut,
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.c b/drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.c
> index d73145dab173..5db96ab38dd2 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.c
> @@ -1728,8 +1728,8 @@ static struct resource_funcs dcn316_res_pool_funcs = {
>   	.add_stream_to_ctx = dcn30_add_stream_to_ctx,
>   	.add_dsc_to_stream_resource = dcn20_add_dsc_to_stream_resource,
>   	.remove_stream_from_ctx = dcn20_remove_stream_from_ctx,
> -	.populate_dml_writeback_from_context = dcn30_populate_dml_writeback_from_context,
> -	.set_mcif_arb_params = dcn30_set_mcif_arb_params,
> +	.populate_dml_writeback_from_context = dcn31_populate_dml_writeback_from_context,
> +	.set_mcif_arb_params = dcn31_set_mcif_arb_params,
>   	.find_first_free_match_stream_enc_for_link = dcn10_find_first_free_match_stream_enc_for_link,
>   	.acquire_post_bldn_3dlut = dcn30_acquire_post_bldn_3dlut,
>   	.release_post_bldn_3dlut = dcn30_release_post_bldn_3dlut,

Hi,

Sorry for the delay,

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@....com>

Also, applied to amd-staging-drm-next.

Thanks