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Message-ID: <CAK8P3a1mQr5mRQhviymJLdvibUYPyk94MrRmhj4e74+d5_485Q@mail.gmail.com>
Date: Wed, 27 Apr 2022 17:53:56 +0200
From: Arnd Bergmann <arnd@...db.de>
To: Sai Prakash Ranjan <quic_saipraka@...cinc.com>
Cc: Will Deacon <will@...nel.org>,
Catalin Marinas <catalin.marinas@....com>,
Arnd Bergmann <arnd@...db.de>,
Steven Rostedt <rostedt@...dmis.org>,
Marc Zyngier <maz@...nel.org>,
Trilok Soni <quic_tsoni@...cinc.com>,
quic_psodagud@...cinc.com, gregkh <gregkh@...uxfoundation.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
linux-arm-msm <linux-arm-msm@...r.kernel.org>,
Mathieu Poirier <mathieu.poirier@...aro.org>,
Suzuki K Poulose <suzuki.poulose@....com>,
Mike Leach <mike.leach@...aro.org>, coresight@...ts.linaro.org
Subject: Re: [PATCHv10 2/6] coresight: etm4x: Use asm-generic IO memory barriers
On Thu, Feb 24, 2022 at 7:07 AM Sai Prakash Ranjan
<quic_saipraka@...cinc.com> wrote:
>
> Per discussion in [1], it was decided to move to using architecture
> independent/asm-generic IO memory barriers to have just one set of
> them and deprecate use of arm64 specific IO memory barriers in driver
> code. So replace current usage of __io_rmb()/__iowmb() in drivers to
> __io_ar()/__io_bw().
>
> [1] https://lore.kernel.org/lkml/CAK8P3a0L2tLeF1Q0+0ijUxhGNaw+Z0fyPC1oW6_ELQfn0=i4iw@mail.gmail.com/
>
> Cc: Catalin Marinas <catalin.marinas@....com>
> Cc: Mathieu Poirier <mathieu.poirier@...aro.org>
> Cc: Suzuki K Poulose <suzuki.poulose@....com>
> Cc: Mike Leach <mike.leach@...aro.org>
> Cc: coresight@...ts.linaro.org
> Signed-off-by: Sai Prakash Ranjan <quic_saipraka@...cinc.com>
Reviewed-by: Arnd Bergmann <arnd@...db.de>
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