linux-kernel - Re: [PATCH v3 2/3] soc: rockchip: power-domain: Replace dsb() with smb()

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Message-ID: <d72eb7a7-f922-3270-422b-4e27505de530@arm.com>
Date:   Wed, 27 Apr 2022 01:25:39 +0100
From:   Robin Murphy <robin.murphy@....com>
To:     Peter Geis <pgwipeout@...il.com>,
        Brian Norris <briannorris@...omium.org>
Cc:     Heiko Stuebner <heiko@...ech.de>, Arnd Bergmann <arnd@...db.de>,
        "open list:ARM/Rockchip SoC..." <linux-rockchip@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Guenter Roeck <linux@...ck-us.net>
Subject: Re: [PATCH v3 2/3] soc: rockchip: power-domain: Replace dsb() with
 smb()

On 2022-04-27 00:55, Peter Geis wrote:
> On Mon, Apr 25, 2022 at 9:46 PM Brian Norris <briannorris@...omium.org> wrote:
>>
>> It's unclear if these are really needed at all, but seemingly their
>> purpose is only as a write barrier. Use the general macro instead of the
>> ARM-specific one.
>>
>> This driver is partially marked for COMPILE_TEST'ing, but it doesn't
>> build under non-ARM architectures. Fix this up before *really* enabling
>> it for COMPILE_TEST.
>>
>> Signed-off-by: Brian Norris <briannorris@...omium.org>
>> ---
>>
>> Changes in v3:
>>   * New in v3
>>
>>   drivers/soc/rockchip/pm_domains.c | 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c
>> index 1b029e494274..cf16ff9b73b3 100644
>> --- a/drivers/soc/rockchip/pm_domains.c
>> +++ b/drivers/soc/rockchip/pm_domains.c
>> @@ -178,7 +178,7 @@ static int rockchip_pmu_set_idle_request(struct rockchip_pm_domain *pd,
>>                  regmap_update_bits(pmu->regmap, pmu->info->req_offset,
>>                                     pd_info->req_mask, idle ? -1U : 0);
>>
>> -       dsb(sy);
>> +       wmb();
> 
> Just curious, shouldn't this be mb() instead of wmb()?
>  From the arm64 barrier.h:
> 
> #define mb() dsb(sy)
> #define wmb() dsb(st)

As I mentioned on v2, that would be the literal translation, however 
there's no concurrency since this is happening under a mutex, so there's 
no other agent against whose accesses loads would need to be 
synchronised, therefore the only logical reason those DSBs were ever 
there at all must be to ensure that the prior store(s) have been issued 
to their destination before proceeding. The history implies that this 
dates all the way back to RK3288, where Armv7's argument-less DSB lacked 
that distinction anyway.

Robin.

>>
>>          /* Wait util idle_ack = 1 */
>>          target_ack = idle ? pd_info->ack_mask : 0;
>> @@ -285,7 +285,7 @@ static void rockchip_do_pmu_set_power_domain(struct rockchip_pm_domain *pd,
>>                  regmap_update_bits(pmu->regmap, pmu->info->pwr_offset,
>>                                     pd->info->pwr_mask, on ? 0 : -1U);
>>
>> -       dsb(sy);
>> +       wmb();
>>
>>          if (readx_poll_timeout_atomic(rockchip_pmu_domain_is_on, pd, is_on,
>>                                        is_on == on, 0, 10000)) {
>> --
>> 2.36.0.rc2.479.g8af0fa9b8e-goog
>>
>>
>> _______________________________________________
>> Linux-rockchip mailing list
>> Linux-rockchip@...ts.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-rockchip

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