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Message-ID: <20220427124741.18245-6-sam.shih@mediatek.com>
Date: Wed, 27 Apr 2022 20:47:41 +0800
From: Sam Shih <sam.shih@...iatek.com>
To: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Matthias Brugger <matthias.bgg@...il.com>,
<devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
CC: John Crispin <john@...ozen.org>, Ryder Lee <ryder.lee@...nel.org>,
"Sam Shih" <sam.shih@...iatek.com>, Vic Wu <vic.wu@...iatek.com>
Subject: [PATCH 5/5] arm64: dts: mt7986: add crypto related device nodes
This patch adds crypto engine support for MT7986.
Signed-off-by: Vic Wu <vic.wu@...iatek.com>
Signed-off-by: Sam Shih <sam.shih@...iatek.com>
---
arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 4 ++++
arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 15 +++++++++++++++
arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 4 ++++
3 files changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
index de6475078568..714a4e73fe0b 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
@@ -43,6 +43,10 @@
};
};
+&crypto {
+ status = "okay";
+};
+
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pcie_pins>;
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
index ff685900baa4..6de9b941a513 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
@@ -200,6 +200,21 @@
status = "disabled";
};
+ crypto: crypto@...20000 {
+ compatible = "inside-secure,safexcel-eip97";
+ reg = <0 0x10320000 0 0x40000>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ring0", "ring1", "ring2", "ring3";
+ clocks = <&infracfg CLK_INFRA_EIP97_CK>;
+ clock-names = "infra_eip97_ck";
+ assigned-clocks = <&topckgen CLK_TOP_EIP_B_SEL>;
+ assigned-clock-parents = <&apmixedsys CLK_APMIXED_NET2PLL>;
+ status = "disabled";
+ };
+
uart0: serial@...02000 {
compatible = "mediatek,mt7986-uart",
"mediatek,mt6577-uart";
diff --git a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
index 6bd477e1f484..d4078feb4aad 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
@@ -43,6 +43,10 @@
};
};
+&crypto {
+ status = "okay";
+};
+
&pio {
spi_flash_pins: spi-flash-pins {
mux {
--
2.18.0
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