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Message-ID: <CACRpkdb2zuXpTkiXNtC6KKRO55Ks-yep-TBq9YD_x9yegZ-iyA@mail.gmail.com>
Date: Fri, 29 Apr 2022 00:39:18 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Michael Walle <michael@...le.cc>
Cc: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
Lars Povlsen <lars.povlsen@...rochip.com>,
linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Horatiu Vultur <horatiu.vultur@...rochip.com>
Subject: Re: [PATCH v3 0/2] pinctrl: ocelot: add shared reset
On Wed, Apr 20, 2022 at 9:19 PM Michael Walle <michael@...le.cc> wrote:
> On LAN966x SoCs, there is an internal reset which is used to reset the
> switch core. But this will also reset the GPIO and the SGPIO. Thus add
> support for this shared reset line.
>
> changes since v2:
> - use dev_err_probe(), thanks Horatiu
Picked this v3 version rather than v2.
Thanks!
Yours,
Linus Walleij
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