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Message-ID: <CAMuHMdX_CwsmzOHBi0TVBR7KOSqW0tY5=94betF_B40gkHoYxQ@mail.gmail.com>
Date: Thu, 28 Apr 2022 11:50:21 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Herve Codina <herve.codina@...tlin.com>
Cc: Marek Vasut <marek.vasut+renesas@...il.com>,
Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Magnus Damm <magnus.damm@...il.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Krzysztof Wilczyński <kw@...ux.com>,
Rob Herring <robh@...nel.org>,
linux-pci <linux-pci@...r.kernel.org>,
Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Sergey Shtylyov <s.shtylyov@....ru>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Clement Leger <clement.leger@...tlin.com>,
Miquel Raynal <miquel.raynal@...tlin.com>
Subject: Re: [PATCH v3 6/8] ARM: dts: r9a06g032: Add internal PCI bridge node
Hi Hervé,
On Thu, Apr 28, 2022 at 11:49 AM Geert Uytterhoeven
<geert@...ux-m68k.org> wrote:
> > --- a/arch/arm/boot/dts/r9a06g032.dtsi
> > +++ b/arch/arm/boot/dts/r9a06g032.dtsi
> > @@ -212,6 +212,35 @@ gic: interrupt-controller@...01000 {
> > interrupts =
> > <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
> > };
> > +
> > + pci_usb: pci@...30000 {
Please preserve sort order (by unit address).
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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