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Message-ID: <YmqE+80xyBoIJvto@sirena.org.uk>
Date: Thu, 28 Apr 2022 13:13:47 +0100
From: Mark Brown <broonie@...nel.org>
To: Jiaxin Yu <jiaxin.yu@...iatek.com>
Cc: robh+dt@...nel.org, angelogioacchino.delregno@...labora.com,
aaronyu@...gle.com, matthias.bgg@...il.com, trevor.wu@...iatek.com,
tzungbi@...gle.com, julianbraha@...il.com,
alsa-devel@...a-project.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [v4 07/18] ASoC: mediatek: mt8186: support i2s in platform driver
On Thu, Apr 28, 2022 at 05:33:44PM +0800, Jiaxin Yu wrote:
> +/* clock source control */
> +static const char * const mt8186_i2s_src_str[] = {
> + "Master", "Slave"
> +};
> +
> +static const struct soc_enum mt8186_i2s_src_enum[] = {
> + SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(mt8186_i2s_src_str),
> + mt8186_i2s_src_str),
> +};
Not clear why this is user visible? Shouldn't the machine driver be
setting this. Also please use more modern provider/consumer terminology
for the clocking.
> +static int mt8186_i2s_hd_set(struct snd_kcontrol *kcontrol,
> + struct snd_ctl_elem_value *ucontrol)
> +{
> + return -EINVAL;
> + }
> +
> + i2s_priv->low_jitter_en = hd_en;
> +
> + return 0;
> +}
Same issue as on the other patch with the events - like I said there
mixer-test will find a bunch of these issues for you.
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