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Message-Id: <20220428131128.5053-2-yuji2.ishikawa@toshiba.co.jp>
Date: Thu, 28 Apr 2022 22:11:25 +0900
From: Yuji Ishikawa <yuji2.ishikawa@...hiba.co.jp>
To: Rob Herring <robh+dt@...nel.org>,
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...hiba.co.jp>,
Sumit Semwal <sumit.semwal@...aro.org>,
Christian König <christian.koenig@....com>
Cc: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-media@...r.kernel.org, dri-devel@...ts.freedesktop.org,
linaro-mm-sig@...ts.linaro.org, yuji2.ishikawa@...hiba.co.jp
Subject: [PATCH 1/4] dt-bindings: soc: visconti: Add Toshiba Visconti DNN image processing accelerator bindings
This commit adds the Device Tree binding documentation that allows to describe
the DNN image processing accelerator found in Toshiba Visconti SoCs.
Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@...hiba.co.jp>
Reviewed-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...hiba.co.jp>
---
.../soc/visconti/toshiba,visconti-dnn.yaml | 54 +++++++++++++++++++
1 file changed, 54 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/visconti/toshiba,visconti-dnn.yaml
diff --git a/Documentation/devicetree/bindings/soc/visconti/toshiba,visconti-dnn.yaml b/Documentation/devicetree/bindings/soc/visconti/toshiba,visconti-dnn.yaml
new file mode 100644
index 000000000..28576a55e
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/visconti/toshiba,visconti-dnn.yaml
@@ -0,0 +1,54 @@
+# SPDX-LIcense-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/visconti/toshiba,visconti-dnn.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Toshiba Visconti DNN image processing accelerator
+
+maintainers:
+ - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...hiba.co.jp>
+
+description: |
+ Toshiba Visconti DNN image processing accelerator.
+ Visconti5 have up to 2 DNN units.
+
+properties:
+ compatible:
+ items:
+ - const: toshiba,visconti-dnn
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ index:
+ enum: [0, 1]
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - index
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ dnn0: dnn@...80000 {
+ compatible = "toshiba,visconti-dnn";
+ reg = <0 0x14280000 0 0x8000>;
+ interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
+ index = <0>;
+ status = "disabled";
+ };
+ };
--
2.17.1
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