lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <90084676-ccea-1250-698c-f2a773b9e24d@linaro.org>
Date:   Fri, 29 Apr 2022 18:36:41 +0300
From:   Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To:     Robert Foss <robert.foss@...aro.org>, bjorn.andersson@...aro.org,
        agross@...nel.org, mturquette@...libre.com, sboyd@...nel.org,
        robh+dt@...nel.org, krzk+dt@...nel.org, jonathan@...ek.ca,
        tdas@...eaurora.org, anischal@...eaurora.org,
        linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Cc:     Rob Herring <robh@...nel.org>
Subject: Re: [PATCH v1 7/9] dt-bindings: clock: Add Qcom SM8350 DISPCC
 bindings

On 29/04/2022 18:12, Robert Foss wrote:
> From: Jonathan Marek <jonathan@...ek.ca>
> 
> Add sm8350 DISPCC bindings, which are simply a symlink to the sm8250
> bindings. Update the documentation with the new compatible.
> 
> Signed-off-by: Jonathan Marek <jonathan@...ek.ca>
> Reviewed-by: Rob Herring <robh@...nel.org>

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>

> ---
> 
> Due to qcom,dispcc-sm8350.h being a symlink, checkpatch is not happy
> with this patch. Other than warnings related to this, it should be good.
> 
> 
>   .../devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml       | 6 ++++--
>   include/dt-bindings/clock/qcom,dispcc-sm8350.h              | 1 +
>   2 files changed, 5 insertions(+), 2 deletions(-)
>   create mode 120000 include/dt-bindings/clock/qcom,dispcc-sm8350.h
> 
> diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml
> index 31497677e8de..7a8d375e055e 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml
> @@ -4,18 +4,19 @@
>   $id: http://devicetree.org/schemas/clock/qcom,dispcc-sm8x50.yaml#
>   $schema: http://devicetree.org/meta-schemas/core.yaml#
>   
> -title: Qualcomm Display Clock & Reset Controller Binding for SM8150/SM8250
> +title: Qualcomm Display Clock & Reset Controller Binding for SM8150/SM8250/SM8350
>   
>   maintainers:
>     - Jonathan Marek <jonathan@...ek.ca>
>   
>   description: |
>     Qualcomm display clock control module which supports the clocks, resets and
> -  power domains on SM8150 and SM8250.
> +  power domains on SM8150/SM8250/SM8350.
>   
>     See also:
>       dt-bindings/clock/qcom,dispcc-sm8150.h
>       dt-bindings/clock/qcom,dispcc-sm8250.h
> +    dt-bindings/clock/qcom,dispcc-sm8350.h
>   
>   properties:
>     compatible:
> @@ -23,6 +24,7 @@ properties:
>         - qcom,sc8180x-dispcc
>         - qcom,sm8150-dispcc
>         - qcom,sm8250-dispcc
> +      - qcom,sm8350-dispcc
>   
>     clocks:
>       items:
> diff --git a/include/dt-bindings/clock/qcom,dispcc-sm8350.h b/include/dt-bindings/clock/qcom,dispcc-sm8350.h
> new file mode 120000
> index 000000000000..0312b4544acb
> --- /dev/null
> +++ b/include/dt-bindings/clock/qcom,dispcc-sm8350.h
> @@ -0,0 +1 @@
> +qcom,dispcc-sm8250.h
> \ No newline at end of file


-- 
With best wishes
Dmitry

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ