linux-kernel - Re: [PATCH v1 9/9] arm64: dts: qcom: sm8350: Add DISPCC node

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Message-ID: <82726e9e-8089-e43e-3493-8d906d3ae830@linaro.org>
Date:   Fri, 29 Apr 2022 18:37:56 +0300
From:   Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To:     Robert Foss <robert.foss@...aro.org>, bjorn.andersson@...aro.org,
        agross@...nel.org, mturquette@...libre.com, sboyd@...nel.org,
        robh+dt@...nel.org, krzk+dt@...nel.org, jonathan@...ek.ca,
        tdas@...eaurora.org, anischal@...eaurora.org,
        linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1 9/9] arm64: dts: qcom: sm8350: Add DISPCC node

On 29/04/2022 18:12, Robert Foss wrote:
> Add the dispcc clock-controller DT node for sm8350.
> 
> Signed-off-by: Robert Foss <robert.foss@...aro.org>

With mmcx-supply removed:

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>


> ---
>   arch/arm64/boot/dts/qcom/sm8350.dtsi | 25 +++++++++++++++++++++++++
>   1 file changed, 25 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> index c49735d1b458..252fdef927cb 100644
> --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> @@ -3,7 +3,9 @@
>    * Copyright (c) 2020, Linaro Limited
>    */
>   
> +#include <dt-bindings/interconnect/qcom,sm8350.h>
>   #include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/clock/qcom,dispcc-sm8350.h>
>   #include <dt-bindings/clock/qcom,gcc-sm8350.h>
>   #include <dt-bindings/clock/qcom,rpmh.h>
>   #include <dt-bindings/dma/qcom-gpi.h>
> @@ -2533,6 +2535,29 @@ usb_2_dwc3: usb@...0000 {
>   			};
>   		};
>   
> +		dispcc: clock-controller@...0000 {
> +			compatible = "qcom,sm8350-dispcc";
> +			reg = <0 0x0af00000 0 0x10000>;
> +			mmcx-supply = <&mmcx_reg>;
> +			clocks = <&rpmhcc RPMH_CXO_CLK>,
> +				 <0>,
> +				 <0>,
> +				 <0>,
> +				 <0>,
> +				 <0>,
> +				 <0>;
> +			clock-names = "bi_tcxo",
> +				      "dsi0_phy_pll_out_byteclk",
> +				      "dsi0_phy_pll_out_dsiclk",
> +				      "dsi1_phy_pll_out_byteclk",
> +				      "dsi1_phy_pll_out_dsiclk",
> +				      "dp_phy_pll_link_clk",
> +				      "dp_phy_pll_vco_div_clk";
> +			#clock-cells = <1>;
> +			#reset-cells = <1>;
> +			#power-domain-cells = <1>;
> +		};
> +
>   		adsp: remoteproc@...00000 {
>   			compatible = "qcom,sm8350-adsp-pas";
>   			reg = <0 0x17300000 0 0x100>;


-- 
With best wishes
Dmitry