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Date: Fri, 29 Apr 2022 09:10:06 -0700 From: Doug Anderson <dianders@...omium.org> To: Matthias Kaehlcke <mka@...omium.org>, Bjorn Andersson <bjorn.andersson@...aro.org> Cc: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>, Andy Gross <agross@...nel.org>, Rob Herring <robh+dt@...nel.org>, linux-arm-msm <linux-arm-msm@...r.kernel.org>, "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@...r.kernel.org>, LKML <linux-kernel@...r.kernel.org>, quic_rohkumar@...cinc.com, Srinivas Kandagatla <srinivas.kandagatla@...aro.org>, Stephen Boyd <swboyd@...omium.org>, Judy Hsiao <judyhsiao@...omium.org>, Venkata Prasad Potturu <quic_potturu@...cinc.com> Subject: Re: [PATCH v12 4/4] arm64: dts: qcom: sc7280-herobrine: Add lpi pinmux properties for CRD 3.0/3.1 Hi, On Thu, Apr 28, 2022 at 5:02 PM Matthias Kaehlcke <mka@...omium.org> wrote: > > On Wed, Apr 27, 2022 at 10:39:43PM +0530, Srinivasa Rao Mandadapu wrote: > > Add LPASS LPI pinctrl properties, which are required for Audio > > functionality on herobrine based platforms of rev5+ > > (aka CRD 3.0/3.1) boards. > > > > Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com> > > Co-developed-by: Venkata Prasad Potturu <quic_potturu@...cinc.com> > > Signed-off-by: Venkata Prasad Potturu <quic_potturu@...cinc.com> > > I'm not super firm in pinctrl territory, a few maybe silly questions > below. > > > arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts | 84 +++++++++++++++++++++++ > > 1 file changed, 84 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts > > index deaea3a..dfc42df 100644 > > --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts > > +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts > > @@ -111,6 +111,90 @@ ap_ts_pen_1v8: &i2c13 { > > * - If a pin is not hooked up on Qcard, it gets no name. > > */ > > > > +&lpass_dmic01 { > > + clk { > > + drive-strength = <8>; > > + }; Ugh, I've been distracted and I hadn't realized we were back to the two-level syntax. Definitely not my favorite for all the reasons I talked about [1]. I guess you took Bjorn's silence to my response to mean that you should switch back to this way? :( Bjorn: can you clarify? [1] https://lore.kernel.org/r/CAD=FV=VicFiX6QkBksZs1KLwJ5x4eCte6j5RWOBPN+WwiXm2Cw@mail.gmail.com/ > > +}; > > + > > +&lpass_dmic01_sleep { > > + clk { > > + drive-strength = <2>; > > Does the drive strength really matter in the sleep state, is the SoC actively > driving the pin? My understanding is that if a pin is left as an output in sleep state that there is a slight benefit to switching it to drive-strength 2. > > + bias-disable; > > What should this be in active/default state? If I understand correctly > after a transition from 'sleep' to 'default' this setting will remain, > since the default config doesn't specify a setting for bias. Your understanding matches mine but I haven't tested it and I remember sometimes being surprised in this corner of pinmux before. I think it's better to put the bias in the default state if it should be that way all the time, or have a bias in both the default and sleep state if they need to be different.
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