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Date:   Fri, 29 Apr 2022 17:56:43 +0800
From:   Jiaxin Yu <jiaxin.yu@...iatek.com>
To:     Mark Brown <broonie@...nel.org>
CC:     <robh+dt@...nel.org>, <angelogioacchino.delregno@...labora.com>,
        <aaronyu@...gle.com>, <matthias.bgg@...il.com>,
        <trevor.wu@...iatek.com>, <tzungbi@...gle.com>,
        <julianbraha@...il.com>, <alsa-devel@...a-project.org>,
        <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>,
        <Project_Global_Chrome_Upstream_Group@...iatek.com>
Subject: Re: [v4 07/18] ASoC: mediatek: mt8186: support i2s in platform
 driver

On Thu, 2022-04-28 at 13:13 +0100, Mark Brown wrote:
> On Thu, Apr 28, 2022 at 05:33:44PM +0800, Jiaxin Yu wrote:
> 
> > +/* clock source control */
> > +static const char * const mt8186_i2s_src_str[] = {
> > +	"Master", "Slave"
> > +};
> > +
> > +static const struct soc_enum mt8186_i2s_src_enum[] = {
> > +	SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(mt8186_i2s_src_str),
> > +			    mt8186_i2s_src_str),
> > +};
> 
> Not clear why this is user visible?  Shouldn't the machine driver be
> setting this.  Also please use more modern provider/consumer
> terminology
> for the clocking.
> 
Sorry, here are the controls left by debug, I should remove them.
Yes, I should use provider/consumer terminology for the clocking, just
link the SND_SOC_DAIFMT_CBP_CFC.

> > +static int mt8186_i2s_hd_set(struct snd_kcontrol *kcontrol,
> > +			     struct snd_ctl_elem_value *ucontrol)
> > +{
> > +		return -EINVAL;
> > +	}
> > +
> > +	i2s_priv->low_jitter_en = hd_en;
> > +
> > +	return 0;
> > +}
> 
> Same issue as on the other patch with the events - like I said there
> mixer-test will find a bunch of these issues for you.
Yes, I remember it.
Next I will continue to use mixer-test to check all of the mixer
controls.


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