linux-kernel - Re: [PATCH 1/2] clk: hisilicon: add CRG driver Hi3521a SoC

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <0b66148a-c65f-2acf-9751-ae931778ad45@linaro.org>
Date:   Sun, 1 May 2022 10:35:37 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     "Marty E. Plummer" <hanetzer@...rtmail.com>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc:     linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
        devicetree@...r.kernel.org
Subject: Re: [PATCH 1/2] clk: hisilicon: add CRG driver Hi3521a SoC

On 01/05/2022 07:10, Marty E. Plummer wrote:
> Add CRG driver for Hi3521A SoC. CRG (Clock and Reset Generator) module
> generates clock and reset signals used by other module blocks on SoC.
> 
>
(...)

> +		return;
> +
> +	hisi_clk_register_mux(hi3521a_sysctrl_mux_clks,
> +				ARRAY_SIZE(hi3521a_sysctrl_mux_clks),
> +				clk_data);
> +}
> +CLK_OF_DECLARE(hi3521a_sysctrl, "hisilicon,hi3521a-sysctrl", hi3521a_sysctrl_init);
Missing bindings.

Best regards,
Krzysztof