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Message-ID: <3c2f2e75-153b-05bf-9878-70fc1c1a81b1@linaro.org>
Date: Sun, 1 May 2022 10:55:37 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Jonathan Neuschäfer <j.neuschaefer@....net>,
linux-clk@...r.kernel.org, openbmc@...ts.ozlabs.org
Cc: linux-kernel@...r.kernel.org, linux-watchdog@...r.kernel.org,
devicetree@...r.kernel.org,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Avi Fishman <avifishman70@...il.com>,
Tomer Maimon <tmaimon77@...il.com>,
Tali Perry <tali.perry1@...il.com>,
Patrick Venture <venture@...gle.com>,
Nancy Yuen <yuenn@...gle.com>,
Benjamin Fair <benjaminfair@...gle.com>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
Philipp Zabel <p.zabel@...gutronix.de>,
Wim Van Sebroeck <wim@...ux-watchdog.org>,
Guenter Roeck <linux@...ck-us.net>
Subject: Re: [PATCH v2 4/7] dt-bindings: clock: Add Nuvoton WPCM450
clock/reset controller
On 29/04/2022 19:20, Jonathan Neuschäfer wrote:
> The Nuvoton WPCM450 SoC has a combined clock and reset controller.
> Add a devicetree binding for it, as well as definitions for the bit
> numbers used by it.
>
> Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@....net>
> ---
>
> v2:
> - Various improvements, suggested by Krzysztof Kozlowski
>
> v1:
> - https://lore.kernel.org/lkml/20220422183012.444674-5-j.neuschaefer@gmx.net/
> ---
> .../bindings/clock/nuvoton,wpcm450-clk.yaml | 66 ++++++++++++++++++
> .../dt-bindings/clock/nuvoton,wpcm450-clk.h | 67 +++++++++++++++++++
> 2 files changed, 133 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,wpcm450-clk.yaml
> create mode 100644 include/dt-bindings/clock/nuvoton,wpcm450-clk.h
>
> diff --git a/Documentation/devicetree/bindings/clock/nuvoton,wpcm450-clk.yaml b/Documentation/devicetree/bindings/clock/nuvoton,wpcm450-clk.yaml
> new file mode 100644
> index 0000000000000..3ed3e40e39637
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/nuvoton,wpcm450-clk.yaml
> @@ -0,0 +1,66 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/nuvoton,wpcm450-clk.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nuvoton WPCM450 clock controller
> +
> +maintainers:
> + - Jonathan Neuschäfer <j.neuschaefer@....net>
> +
> +description:
> + The clock controller of the Nuvoton WPCM450 SoC supplies clocks and resets to
> + the rest of the chip.
> +
> +properties:
> + compatible:
> + const: nuvoton,wpcm450-clk
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: Reference clock oscillator (should be 48 MHz)
> +
> + clock-names:
> + items:
> + - const: refclk
Sorry for not bringing it up earlier - this should be just "ref". Names
in values should not have suffixes (so no "tx-dma", "wake-gpio",
"ref-clk" etc).
Best regards,
Krzysztof
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