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Message-Id: <20220502100233.6023-5-viraj.shah@linutronix.de>
Date: Mon, 2 May 2022 12:02:33 +0200
From: Viraj Shah <viraj.shah@...utronix.de>
To: shawnguo@...nel.org, s.hauer@...gutronix.de
Cc: Pengutronix Kernel Team <kernel@...gutronix.de>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
Lucas Stach <l.stach@...gutronix.de>,
Adam Ford <aford173@...il.com>,
Tim Harvey <tharvey@...eworks.com>,
Peng Fan <peng.fan@....com>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH v1 4/4] arm64: dts: imx8mm.dtsi: Add resets for dispmix power domain.
The resets are controlled from src. From reference manual page
959, display controller needs DISP_RESET bit to be set to reset
dispmix.
Signed-off-by: Viraj Shah <viraj.shah@...utronix.de>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 1ee05677c2dd..11a6cae5bb99 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -734,6 +734,7 @@
assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_1000M>,
<&clk IMX8MM_SYS_PLL1_800M>;
assigned-clock-rates = <500000000>, <200000000>;
+ resets = <&src IMX8MQ_RESET_DISP_RESET>;
};
pgc_mipi: power-domain@11 {
--
2.20.1
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