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Message-ID: <Ym+u9yYrV9mxkyWX@matsya>
Date:   Mon, 2 May 2022 15:44:15 +0530
From:   Vinod Koul <vkoul@...nel.org>
To:     Wangseok Lee <wangseok.lee@...sung.com>
Cc:     Krzysztof Kozlowski <krzk@...nel.org>,
        robh+dt <robh+dt@...nel.org>, krzk+dt <krzk+dt@...nel.org>,
        kishon <kishon@...com>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        "jesper.nilsson" <jesper.nilsson@...s.com>,
        "lars.persson" <lars.persson@...s.com>,
        bhelgaas <bhelgaas@...gle.com>,
        linux-phy <linux-phy@...ts.infradead.org>,
        linux-pci <linux-pci@...r.kernel.org>,
        devicetree <devicetree@...r.kernel.org>,
        "lorenzo.pieralisi" <lorenzo.pieralisi@....com>, kw <kw@...ux.com>,
        linux-arm-kernel <linux-arm-kernel@...s.com>,
        kernel <kernel@...s.com>, Moon-Ki Jun <moonki.jun@...sung.com>,
        Dongjin Yang <dj76.yang@...sung.com>
Subject: Re: [PATCH 0/5] Add support for Axis, ARTPEC-8 PCIe driver

On 22-04-22, 08:57, Wangseok Lee wrote:
> > On 18/04/2022 09:20, Wangseok Lee wrote:

> > Maybe, quite probably. The reluctance to extend any existing code makes
> > me doubting this, but I admit that there are many differences.
> > 
> >> For these reasons, my opinion is that better to create
> >> a phy, controller both driver with a new file.
> >> Please let me know your opinion.
> > 
> > At the end it's mostly the decision of PCIe and phy subsystem
> > maintainers whether they want to have separate drivers for DWC PCIe
> > blocks in ARMv8 Samsung SoCs.
> > 
> > In any case, the driver code looks like copied-pasted from some vendor
> > sources, so you need to bring it to shape.

I think havong a common driver helps everyone, many vendors do that
already. If you have a technical issue of adding and maintaining a
common driver upstream we would be eager to understand and help with
that...

-- 
~Vinod

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