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Date:   Mon, 2 May 2022 15:43:38 +0200
From:   Clément Léger <clement.leger@...tlin.com>
To:     Florian Fainelli <f.fainelli@...il.com>
Cc:     Andrew Lunn <andrew@...n.ch>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Vladimir Oltean <olteanv@...il.com>,
        "David S . Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Magnus Damm <magnus.damm@...il.com>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Russell King <linux@...linux.org.uk>,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
        Herve Codina <herve.codina@...tlin.com>,
        Miquèl Raynal <miquel.raynal@...tlin.com>,
        Milan Stevanovic <milan.stevanovic@...com>,
        Jimmy Lalande <jimmy.lalande@...com>,
        Pascal Eberhard <pascal.eberhard@...com>,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        linux-renesas-soc@...r.kernel.org, netdev@...r.kernel.org
Subject: Re: [net-next v2 02/12] net: dsa: add Renesas RZ/N1 switch tag
 driver

Le Fri, 29 Apr 2022 09:22:21 -0700,
Florian Fainelli <f.fainelli@...il.com> a écrit :

> On 4/29/22 07:34, Clément Léger wrote:
> > The switch that is present on the Renesas RZ/N1 SoC uses a specific
> > VLAN value followed by 6 bytes which contains forwarding
> > configuration.
> > 
> > Signed-off-by: Clément Léger <clement.leger@...tlin.com>
> > ---  
> 
> [snip]
> 
> > +struct a5psw_tag {
> > +	__be16 ctrl_tag;
> > +	__be16 ctrl_data;
> > +	__be16 ctrl_data2_hi;
> > +	__be16 ctrl_data2_lo;
> > +} __packed;  
> 
> The structure should already be naturally aligned.

Indeed, I'll remove this packed attribute.

> 
> > +
> > +static struct sk_buff *a5psw_tag_xmit(struct sk_buff *skb, struct
> > net_device *dev) +{
> > +	struct dsa_port *dp = dsa_slave_to_port(dev);
> > +	struct a5psw_tag *ptag;
> > +	u32 data2_val;
> > +
> > +	BUILD_BUG_ON(sizeof(*ptag) != A5PSW_TAG_LEN);
> > +
> > +	/* The Ethernet switch we are interfaced with needs
> > packets to be at
> > +	 * least 64 bytes (including FCS) otherwise they will be
> > discarded when
> > +	 * they enter the switch port logic. When tagging is
> > enabled, we need
> > +	 * to make sure that packets are at least 68 bytes
> > (including FCS and
> > +	 * tag).  
> 
> Did you mean 70 bytes since your tag is 6, and not 4 bytes?

Yes you are right, this should be 70 bytes. Additionnaly, I forgot to
add the FCS len to the number of byte to be padded below.


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