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Message-ID: <1651511286-18690-5-git-send-email-quic_kaushalk@quicinc.com>
Date: Mon, 2 May 2022 10:08:06 -0700
From: Kaushal Kumar <quic_kaushalk@...cinc.com>
To: <agross@...nel.org>, <bjorn.andersson@...aro.org>,
<robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>
CC: <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <manivannan.sadhasivam@...aro.org>,
"Kaushal Kumar" <quic_kaushalk@...cinc.com>
Subject: [PATCH v3 4/4] ARM: dts: qcom: sdx65-mtp: Enable QPIC NAND support
Enable QPIC NAND devicetree node for Qualcomm SDX65-MTP board.
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Signed-off-by: Kaushal Kumar <quic_kaushalk@...cinc.com>
---
arch/arm/boot/dts/qcom-sdx65-mtp.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
index e9c8df9..e747ec0 100644
--- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts
+++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
@@ -249,6 +249,21 @@
status = "okay";
};
+&qpic_nand {
+ status = "okay";
+
+ nand@0 {
+ reg = <0>;
+
+ nand-ecc-strength = <4>;
+ nand-ecc-step-size = <512>;
+ nand-bus-width = <8>;
+ /* ico and efs2 partitions are secured */
+ secure-regions = /bits/ 64 <0x500000 0x500000
+ 0xa00000 0xb00000>;
+ };
+};
+
&usb {
status = "okay";
};
--
2.7.4
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