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Message-Id: <20220502174046.139234-5-krzysztof.kozlowski@linaro.org>
Date: Mon, 2 May 2022 19:40:46 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Georgi Djakov <djakov@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Viresh Kumar <vireshk@...nel.org>, Nishanth Menon <nm@...com>,
Stephen Boyd <sboyd@...nel.org>,
"Rafael J. Wysocki" <rafael@...nel.org>,
linux-arm-msm@...r.kernel.org, linux-pm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Thara Gopinath <thara.gopinath@...aro.org>
Subject: [PATCH 4/4] arm64: dts: qcom: sdm845: Add CPU BWMON
Add device node for CPU-memory BWMON device (bandwidth monitoring) on
SDM845.
Co-developed-by: Thara Gopinath <thara.gopinath@...aro.org>
Signed-off-by: Thara Gopinath <thara.gopinath@...aro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 60 ++++++++++++++++++++++++++++
1 file changed, 60 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 692cf4be4eef..bd4577f0a92f 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -2026,6 +2026,66 @@ llcc: system-cache-controller@...0000 {
interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
};
+ pmu@...6400 {
+ compatible = "qcom,sdm845-cpu-bwmon";
+ reg = <0 0x01436400 0 0x600>;
+
+ interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
+
+ interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
+ <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ interconnect-names = "ddr", "l3c";
+
+ operating-points-v2 = <&cpu_bwmon_opp_table>;
+
+ cpu_bwmon_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ /*
+ * The interconnect paths bandwidths calculated
+ * from msm-4.9 downstream kernel:
+ * - the gladiator_noc-mem_noc from bandwidth
+ * table of qcom,llccbw (property qcom,bw-tbl);
+ * bus width: 4 bytes;
+ * - the OSM L3 from bandiwdth table of
+ * qcom,cpu4-l3lat-mon (qcom,core-dev-table);
+ * bus width: 16 bytes;
+ */
+ opp-0 {
+ opp-peak-kBps = <800000 4800000>;
+ opp-avg-kBps = <800000 4800000>;
+ };
+ opp-1 {
+ opp-peak-kBps = <1804000 9216000>;
+ opp-avg-kBps = <1804000 9216000>;
+ };
+ opp-2 {
+ opp-peak-kBps = <2188000 11980800>;
+ opp-avg-kBps = <2188000 11980800>;
+ };
+ opp-3 {
+ opp-peak-kBps = <3072000 15052800>;
+ opp-avg-kBps = <3072000 15052800>;
+ };
+ opp-4 {
+ opp-peak-kBps = <4068000 19353600>;
+ opp-avg-kBps = <4068000 19353600>;
+ };
+ opp-5 {
+ opp-peak-kBps = <5412000 20889600>;
+ opp-avg-kBps = <5412000 20889600>;
+ };
+ opp-6 {
+ opp-peak-kBps = <6220000 22425600>;
+ opp-avg-kBps = <6220000 22425600>;
+ };
+ opp-7 {
+ opp-peak-kBps = <7216000 25497600>;
+ opp-avg-kBps = <7216000 25497600>;
+ };
+ };
+ };
+
pcie0: pci@...0000 {
compatible = "qcom,pcie-sdm845";
reg = <0 0x01c00000 0 0x2000>,
--
2.32.0
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