[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20220503194546.1287679-1-matthew.gerlach@linux.intel.com>
Date: Tue, 3 May 2022 12:45:43 -0700
From: matthew.gerlach@...ux.intel.com
To: dinguyen@...nel.org, robh+dt@...nel.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
krzysztof.kozlowski+dt@...aro.org
Cc: Matthew Gerlach <matthew.gerlach@...ux.intel.com>
Subject: [PATCH v2 0/3] Add device tree for Intel n6000
From: Matthew Gerlach <matthew.gerlach@...ux.intel.com>
This patch set adds a device tree for the Hard Processor System (HPS)
on an Agilex based Intel n6000 board.
Patch 1 defines the device tree binding for the HPS Copy Engine IP
used to copy a bootable image from host memory to HPS DDR.
Patch 2 defines the binding for the Intel n6000 board itself.
Patch 3 adds the device tree for the n6000 board.
Changelog v1 -> v2:
- add dt binding for copy enging
- add dt binding for n6000 board
- fix copy engine node name
- fix compatible field for copy engine
- remove redundant status field
- add compatibility field for the board
- fix SPDX
- fix how osc1 clock frequency is set
Matthew Gerlach (3):
dt-bindings: misc: add bindings for Intel HPS Copy Engine
dt-bindings: intel: add binding for Intel n6000
arm64: dts: intel: add device tree for n6000
.../bindings/arm/intel,socfpga.yaml | 1 +
.../bindings/misc/intel,hps-copy-engine.yaml | 48 ++++++++++++
arch/arm64/boot/dts/intel/Makefile | 3 +-
.../boot/dts/intel/socfpga_agilex_n6000.dts | 76 +++++++++++++++++++
4 files changed, 127 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/misc/intel,hps-copy-engine.yaml
create mode 100644 arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts
--
2.25.1
Powered by blists - more mailing lists