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Message-ID: <2237223.ElGaqSPkdT@phil>
Date:   Wed, 04 May 2022 01:29:57 +0200
From:   Heiko Stuebner <heiko@...ech.de>
To:     krzk+dt@...nel.org, palmer@...belt.com, robh+dt@...nel.org,
        linux-riscv@...ts.infradead.org
Cc:     conor.dooley@...rochip.com, Cyril.Jean@...rochip.com,
        daire.mcnamara@...rochip.com, paul.walmsley@...ive.com,
        aou@...s.berkeley.edu, palmer@...osinc.com, arnd@...db.de,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-riscv@...ts.infradead.org, Conor Dooley <mail@...chuod.ie>
Subject: Re: [PATCH v3 1/8] riscv: dts: microchip: remove icicle memory clocks

Am Sonntag, 1. Mai 2022, 21:25:52 CEST schrieb Conor Dooley:
> From: Conor Dooley <conor.dooley@...rochip.com>
> 
> The clock properties in the icicle kit's memory entries cause dtbs_check
> errors:
> arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dtb: /: memory@...00000: 'clocks' does not match any of the regexes: 'pinctrl-[0-9]+'
> 
> Get rid of the clocks to avoid the errors.
> 
> Reported-by: Palmer Dabbelt <palmer@...osinc.com>
> Fixes: 0fa6107eca41 ("RISC-V: Initial DTS for Microchip ICICLE board")
> Fixes: 5b28df37d311 ("riscv: dts: microchip: update peripherals in icicle kit device tree")
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>

Reviewed-by: Heiko Stuebner <heiko@...ech.de>

I guess the memory controller consuming this clock will be sitting
somewhere in the io-area of the soc instead

> ---
>  arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
> index 3392153dd0f1..c71d6aa6137a 100644
> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
> @@ -32,14 +32,12 @@ cpus {
>  	ddrc_cache_lo: memory@...00000 {
>  		device_type = "memory";
>  		reg = <0x0 0x80000000 0x0 0x2e000000>;
> -		clocks = <&clkcfg CLK_DDRC>;
>  		status = "okay";
>  	};
>  
>  	ddrc_cache_hi: memory@...0000000 {
>  		device_type = "memory";
>  		reg = <0x10 0x0 0x0 0x40000000>;
> -		clocks = <&clkcfg CLK_DDRC>;
>  		status = "okay";
>  	};
>  };
> 




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