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Message-ID: <20220503100839.dyujyttv34t5equz@proprietary-killer>
Date:   Tue, 3 May 2022 05:08:39 -0500
From:   "Marty E. Plummer" <hanetzer@...rtmail.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc:     Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
        devicetree@...r.kernel.org
Subject: Re: [PATCH 1/2] clk: hisilicon: add CRG driver Hi3521a SoC

On Tue, May 03, 2022 at 11:41:49AM +0200, Krzysztof Kozlowski wrote:
> On 01/05/2022 13:36, Marty E. Plummer wrote:
> > On Sun, May 01, 2022 at 10:35:37AM +0200, Krzysztof Kozlowski wrote:
> >> On 01/05/2022 07:10, Marty E. Plummer wrote:
> >>> Add CRG driver for Hi3521A SoC. CRG (Clock and Reset Generator) module
> >>> generates clock and reset signals used by other module blocks on SoC.
> >>>
> >>>
> >> (...)
> >>
> >>> +		return;
> >>> +
> >>> +	hisi_clk_register_mux(hi3521a_sysctrl_mux_clks,
> >>> +				ARRAY_SIZE(hi3521a_sysctrl_mux_clks),
> >>> +				clk_data);
> >>> +}
> >>> +CLK_OF_DECLARE(hi3521a_sysctrl, "hisilicon,hi3521a-sysctrl", hi3521a_sysctrl_init);
> >> Missing bindings.
> >>
> > Assume you mean the Documentation/dt/binding/... file? Will do. I
> > probably should have prefixed it with RFC, as I'm mostly hoping to get
> > the attention of the hisi people to see what's the deal with the mtd
> > reads being borked.
> 
> Then just don't Cc devicetree folks and put in cover letter disclaimer
> that this was intentionally omitted and will be later fixed.
> 
Yes, I should have disclaimered it, but I didn't intentionally cc dt
folks, just what getmaintainer popped out.
> It is a waste of time of reviewers to look/filter/organize such email,
> if it is intentionally not for us.
> 
> Best regards,
> Krzysztof

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