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Message-ID: <YnFtjzGYwe28tVAA@dev-arch.thelio-3990X>
Date: Tue, 3 May 2022 10:59:43 -0700
From: Nathan Chancellor <nathan@...nel.org>
To: "Rafael J. Wysocki" <rjw@...ysocki.net>
Cc: Linux PCI <linux-pci@...r.kernel.org>,
Linux PM <linux-pm@...r.kernel.org>,
LKML <linux-kernel@...r.kernel.org>,
Bjorn Helgaas <helgaas@...nel.org>,
Mika Westerberg <mika.westerberg@...ux.intel.com>
Subject: Re: [PATCH v3 4/9] PCI/PM: Rework changing power states of PCI
devices
Hi Rafael,
On Thu, Apr 14, 2022 at 03:11:21PM +0200, Rafael J. Wysocki wrote:
> From: Rafael J. Wysocki <rafael.j.wysocki@...el.com>
>
> There are some issues related to changing power states of PCI
> devices, mostly related to carrying out unnecessary actions in some
> places, and the code is generally hard to follow.
>
> 1. pci_power_up() has two callers, pci_set_power_state() and
> pci_pm_default_resume_early(). The latter updates the current
> power state of the device right after calling pci_power_up()
> and it restores the entire config space of the device right
> after that, so pci_power_up() itself need not read the
> PCI_PM_CTRL register or restore the BARs after programming the
> device into D0 in that case.
>
> 2. It is generally hard to get a clear view of the pci_power_up()
> code flow, especially in some corner cases, due to all of the
> involved PCI_PM_CTRL register reads and writes occurring in
> pci_platform_power_transition() and in pci_raw_set_power_state(),
> some of which are redundant.
>
> 3. The transitions from low-power states to D0 and the other way
> around are unnecessarily tangled in pci_raw_set_power_state()
> which causes it to use a redundant local variable and makes it
> rather hard to follow.
>
> To address the above shortcomings, make the following changes:
>
> a. Remove the code handling transitions into D0
> from pci_raw_set_power_state() and rename it as
> pci_set_low_power_state().
>
> b. Add the code handling transitions into D0 directly
> to pci_power_up() and to a new wrapper function
> pci_set_full_power_state() calling it internally that is
> only used in pci_set_power_state().
>
> c. Make pci_power_up() avoid redundant PCI_PM_CTRL register reads
> and make it work in the same way for transitions from any
> low-power states (transitions from D1 and D2 are handled
> slightly differently before the change).
>
> d. Put the restoration of the BARs and the PCI_PM_CTRL
> register read confirming the power state change into
> pci_set_full_power_state() to avoid doing that in
> pci_pm_default_resume_early() unnecessarily.
>
> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@...el.com>
> Reviewed-by: Mika Westerberg <mika.westerberg@...ux.intel.com>
This change as commit 5bffe4c611f5 ("PCI/PM: Rework changing power
states of PCI devices") causes my AMD-based system to fail to fully
boot. As far as I can tell, this might be NVMe related, which might make
getting a full log difficult, as journalctl won't have anywhere to save
it. I see:
nvme nvme0: I/O 8 QID 0 timeout, completion polled
then shortly afterwards:
nvme nvme0: I/O 24 QID 0 timeout, completion polled
nvme nvme0: missing or invalid SUBNQN field
then I am dropped into an emergency shell.
This is a log from the previous commit, which may give some hints about
the configuration of this particular system.
https://gist.github.com/nathanchance/8a56f0939410cb187896e904c72e41e7/raw/b47b2620bdd32d43c7a3b209fcfd9e3d4668f058/good-boot.log
If there is any additional debugging information I can provide or
patches I can try, please let me know!
Cheers,
Nathan
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