[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20220504194413.1003071-2-kan.liang@linux.intel.com>
Date: Wed, 4 May 2022 12:44:10 -0700
From: kan.liang@...ux.intel.com
To: peterz@...radead.org, mingo@...hat.com,
linux-kernel@...r.kernel.org
Cc: Kan Liang <kan.liang@...ux.intel.com>
Subject: [PATCH 2/5] perf/x86/msr: Add new Alder Lake and Raptor Lake support
From: Kan Liang <kan.liang@...ux.intel.com>
The new Alder Lake N and Raptor Lake P also support PPERF and SMI_COUNT
MSRs.
Signed-off-by: Kan Liang <kan.liang@...ux.intel.com>
---
arch/x86/events/msr.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c
index 6d759f88315c..ac542f98c070 100644
--- a/arch/x86/events/msr.c
+++ b/arch/x86/events/msr.c
@@ -103,7 +103,9 @@ static bool test_intel(int idx, void *data)
case INTEL_FAM6_ROCKETLAKE:
case INTEL_FAM6_ALDERLAKE:
case INTEL_FAM6_ALDERLAKE_L:
+ case INTEL_FAM6_ALDERLAKE_N:
case INTEL_FAM6_RAPTORLAKE:
+ case INTEL_FAM6_RAPTORLAKE_P:
if (idx == PERF_MSR_SMI || idx == PERF_MSR_PPERF)
return true;
break;
--
2.35.1
Powered by blists - more mailing lists