linux-kernel - [PATCH v2] arm64: dts: mt8192: Follow binding order for SCP registers

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Message-Id: <20220504214516.2957504-1-nfraprado@collabora.com>
Date:   Wed,  4 May 2022 17:45:16 -0400
From:   Nícolas F. R. A. Prado 
        <nfraprado@...labora.com>
To:     Matthias Brugger <matthias.bgg@...il.com>
Cc:     AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>, kernel@...labora.com,
        Nícolas F. R. A. Prado 
        <nfraprado@...labora.com>,
        Allen-KH Cheng <allen-kh.cheng@...iatek.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-mediatek@...ts.infradead.org
Subject: [PATCH v2] arm64: dts: mt8192: Follow binding order for SCP registers

The dt-binding for SCP documents the reg-names order as sram, cfg,
l1tcm. Update the SCP node on the mt8192 devicetree to follow that
order, which gets rid of a dtbs_check warning. This doesn't change any
behavior since the SCP driver accesses the memory regions through the
names anyway.

Fixes: c63556ec6bfe ("arm64: dts: mt8192: Add SCP node")
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@...labora.com>

---

Changes in v2:
- Added missing Fixes tag

 arch/arm64/boot/dts/mediatek/mt8192.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 26dbe9ecc528..733aec2e7f77 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -699,9 +699,9 @@ spi7: spi@...1e000 {
 		scp: scp@...00000 {
 			compatible = "mediatek,mt8192-scp";
 			reg = <0 0x10500000 0 0x100000>,
-			      <0 0x10700000 0 0x8000>,
-			      <0 0x10720000 0 0xe0000>;
-			reg-names = "sram", "l1tcm", "cfg";
+			      <0 0x10720000 0 0xe0000>,
+			      <0 0x10700000 0 0x8000>;
+			reg-names = "sram", "cfg", "l1tcm";
 			interrupts = <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH 0>;
 			clocks = <&infracfg CLK_INFRA_SCPSYS>;
 			clock-names = "main";
-- 
2.36.0