linux-kernel - Re: [PATCH v14 0/9] Add Sunplus SP7021 SoC Support

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Message-ID: <CAK8P3a0W4wpVwDmCXDkm_u9W=JozrnCnxW7zK3h2XD8f_ODy6w@mail.gmail.com>
Date:   Fri, 6 May 2022 09:31:03 +0200
From:   Arnd Bergmann <arnd@...db.de>
To:     Qin Jian <qinjian@...lus1.com>
Cc:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Russell King - ARM Linux <linux@...linux.org.uk>,
        Arnd Bergmann <arnd@...db.de>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        DTML <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-clk <linux-clk@...r.kernel.org>
Subject: Re: [PATCH v14 0/9] Add Sunplus SP7021 SoC Support

On Fri, May 6, 2022 at 5:23 AM Qin Jian <qinjian@...lus1.com> wrote:
>
> This patch series add Sunplus SP7021 SoC support.
>
> Sunplus SP7021 is an ARM Cortex A7 (4 cores) based SoC. It integrates many
> peripherals (ex: UART, I2C, SPI, SDIO, eMMC, USB, SD card and etc.) into a
> single chip. It is designed for industrial control.
>
> SP7021 consists of two chips (dies) in a package. One is called C-chip
> (computing chip). It is a 4-core ARM Cortex A7 CPU. It adopts high-level
> process (22 nm) for high performance computing. The other is called P-
> chip (peripheral chip). It has many peripherals and an ARM A926 added
> especially for real-time control. P-chip is made for customers. It adopts
> low-level process (ex: 0.11 um) to reduce cost.

Just an update from my side about merging the platform code: the
submission looks mostly sensible to me, but as long as the clk and irqchip
drivers have not finished the review, I cannot take this through the soc
tree. We could consider merging the platform code without those two
drivers, but that seems pointless because it will not boot.

What is the reason you don't include a .dtsi file in this series? Usually
there should be at least one board and the description of the SoC itself.
Again, without those I'm not sure it's worth merging.

For the timing, we are getting close to the 5.19 merge window that
starts once v5.18 is out, and I don't expect that all the above will
be resolved in time, so it looks we will have to defer it by one more
release to 5.20.

          Arnd