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Message-ID: <d2d17aa4-58fc-3621-59bb-0c9ce751ebd1@linux.intel.com>
Date: Fri, 6 May 2022 11:08:59 -0400
From: "Liang, Kan" <kan.liang@...ux.intel.com>
To: Yang Weijiang <weijiang.yang@...el.com>, pbonzini@...hat.com,
jmattson@...gle.com, seanjc@...gle.com, like.xu.linux@...il.com,
vkuznets@...hat.com, wei.w.wang@...el.com, kvm@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v11 14/16] KVM: x86/vmx: Flip Arch LBREn bit on guest
state change
On 5/5/2022 11:33 PM, Yang Weijiang wrote:
> Per spec:"IA32_LBR_CTL.LBREn is saved and cleared on #SMI, and restored
> on RSM. On a warm reset, all LBR MSRs, including IA32_LBR_DEPTH, have their
> values preserved. However, IA32_LBR_CTL.LBREn is cleared to 0, disabling
> LBRs." So clear Arch LBREn bit on #SMI and restore it on RSM manully, also
> clear the bit when guest does warm reset.
>
> Signed-off-by: Yang Weijiang <weijiang.yang@...el.com>
Reviewed-by: Kan Liang <kan.liang@...ux.intel.com>
> ---
> arch/x86/kvm/vmx/vmx.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> index 6d6ee9cf82f5..b38f58868905 100644
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -4593,6 +4593,8 @@ static void vmx_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
> if (!init_event) {
> if (static_cpu_has(X86_FEATURE_ARCH_LBR))
> vmcs_write64(GUEST_IA32_LBR_CTL, 0);
> + } else {
> + flip_arch_lbr_ctl(vcpu, false);
> }
> }
>
> @@ -7704,6 +7706,7 @@ static int vmx_enter_smm(struct kvm_vcpu *vcpu, char *smstate)
> vmx->nested.smm.vmxon = vmx->nested.vmxon;
> vmx->nested.vmxon = false;
> vmx_clear_hlt(vcpu);
> + flip_arch_lbr_ctl(vcpu, false);
> return 0;
> }
>
> @@ -7725,6 +7728,7 @@ static int vmx_leave_smm(struct kvm_vcpu *vcpu, const char *smstate)
> vmx->nested.nested_run_pending = 1;
> vmx->nested.smm.guest_mode = false;
> }
> + flip_arch_lbr_ctl(vcpu, true);
> return 0;
> }
>
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