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Message-Id: <1651801629-30223-7-git-send-email-hongxing.zhu@nxp.com>
Date: Fri, 6 May 2022 09:47:07 +0800
From: Richard Zhu <hongxing.zhu@....com>
To: l.stach@...gutronix.de, bhelgaas@...gle.com, robh+dt@...nel.org,
broonie@...nel.org, lorenzo.pieralisi@....com,
jingoohan1@...il.com, festevam@...il.com,
francesco.dolcini@...adex.com
Cc: hongxing.zhu@....com, linux-pci@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
kernel@...gutronix.de, linux-imx@....com
Subject: [PATCH v9 6/8] PCI: imx6: Disable clocks and regulators after link is down
Since i.MX PCIe doesn't support hot-plug, reduce power consumption
as much as possible by disabling clocks and regulators and returning
error when the link is down.
Signed-off-by: Richard Zhu <hongxing.zhu@....com>
---
drivers/pci/controller/dwc/pci-imx6.c | 19 +++++++++++++++----
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 3ce3993d5797..d122c12193a6 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -845,7 +845,9 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
/* Start LTSSM. */
imx6_pcie_ltssm_enable(dev);
- dw_pcie_wait_for_link(pci);
+ ret = dw_pcie_wait_for_link(pci);
+ if (ret)
+ goto err_out;
if (pci->link_gen == 2) {
/* Allow Gen2 mode after the link is up. */
@@ -876,12 +878,14 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
ret = imx6_pcie_wait_for_speed_change(imx6_pcie);
if (ret) {
dev_err(dev, "Failed to bring link up!\n");
- goto err_reset_phy;
+ goto err_out;
}
}
/* Make sure link training is finished as well! */
- dw_pcie_wait_for_link(pci);
+ ret = dw_pcie_wait_for_link(pci);
+ if (ret)
+ goto err_out;
} else {
dev_info(dev, "Link: Gen2 disabled\n");
}
@@ -890,11 +894,18 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
dev_info(dev, "Link up, Gen%i\n", tmp & PCI_EXP_LNKSTA_CLS);
return 0;
-err_reset_phy:
+err_out:
dev_dbg(dev, "PHY DEBUG_R0=0x%08x DEBUG_R1=0x%08x\n",
dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0),
dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1));
imx6_pcie_reset_phy(imx6_pcie);
+ imx6_pcie_clk_disable(imx6_pcie);
+ if (imx6_pcie->phy != NULL) {
+ phy_power_off(imx6_pcie->phy);
+ phy_exit(imx6_pcie->phy);
+ }
+ if (imx6_pcie->vpcie)
+ regulator_disable(imx6_pcie->vpcie);
return ret;
}
--
2.25.1
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