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Message-ID: <a5b88103-16e2-1dda-3469-78887f91c88c@linaro.org>
Date: Sat, 7 May 2022 13:52:16 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: matthew.gerlach@...ux.intel.com, dinguyen@...nel.org,
robh+dt@...nel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, krzysztof.kozlowski+dt@...aro.org
Subject: Re: [PATCH v3 1/3] dt-bindings: soc: add bindings for Intel HPS Copy
Engine
On 06/05/2022 17:41, matthew.gerlach@...ux.intel.com wrote:
> From: Matthew Gerlach <matthew.gerlach@...ux.intel.com>
>
> Add device tree bindings documentation for the Intel Hard
> Processor System (HPS) Copy Engine.
>
> Signed-off-by: Matthew Gerlach <matthew.gerlach@...ux.intel.com>
> ---
> v3:
> - remove unused label
> - move from misc to soc
> - remove 0x from #address-cells/#size-cells values
> - change hps_cp_eng@0 to dma-controller@0
> - remote inaccurate 'items:' tag
> ---
> .../bindings/soc/intel,hps-copy-engine.yaml | 51 +++++++++++++++++++
> 1 file changed, 51 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/soc/intel,hps-copy-engine.yaml
There are no files laying around in bindings/soc. Each is in its own
vendor subdirectory, so let's don't introduce inconsistencies. Intel
should not be different/special.
Best regards,
Krzysztof
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